IP-AGX-PCIE/4 Altera, IP-AGX-PCIE/4 Datasheet - Page 256

• Manufacturer Part Number: IP-AGX-PCIE/4
• Description: IP CORE - PCI Express X1 And X4 Lanes For Arria GX
• Manufacturer: Altera

Specifications of IP-AGX-PCIE/4

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

15–28
PCI Express Compiler User Guide
BFM Memory Map
Configuration Space Bus and Device Numbering
Configuration of Root Port and Endpoint
1
The BFM shared memory is configured to be two MBytes. The BFM shared memory is
mapped into the first two MBytes of I/O space and also the first two MBytes of
memory space. When the endpoint application generates an I/O or memory
transaction in this range, the BFM reads or writes the shared memory. For illustrations
of the shared memory and I/O address spaces, refer to
Figure 15–9 on page
The root port interface is assigned to be device number 0 on internal bus number 0.
The endpoint can be assigned to be any device number on any bus number (greater
than 0) through the call to procedure ebfm_cfg_rp_ep. The specified bus number is
assigned to be the secondary bus in the root port configuration space.
Before you issue transactions to the endpoint, you must configure the root port and
endpoint configuration space registers. To configure these registers, call the procedure
ebfm_cfg_rp_ep, which is part of altpcietb_bfm_configure.
Configuration procedures and functions are in the VHDL package file
altpcietb_bfm_configure.vhd or in the Verilog HDL include file
altpcietb_bfm_configure.v that uses the altpcietb_bfm_configure_common.v.
The ebfm_cfg_rp_ep executes the following steps to initialize the configuration space:
1. Sets the root port configuration space to enable the root port to send transactions
2. Sets the root port and endpoint PCI Express capability device control registers as
on the PCI Express link.
follows:
a. Disables Error Reporting in both the root port and endpoint. BFM does not
b. Enables Relaxed Ordering in both root port and endpoint.
c. Enables Extended Tags for the endpoint, if the endpoint has that capability.
d. Disables Phantom Functions, Aux Power PM, and No Snoop in both the root port
e. Sets the Max Payload Size to what the endpoint supports because the root port
f. Sets the root port Max Read Request Size to 4 KBytes because the example
g. Sets the endpoint Max Read Request Size equal to the Max Payload Size
have error handling capability.
and endpoint.
supports the maximum payload size.
endpoint design supports breaking the read into as many completions as
necessary.
because the root port does not support breaking the read request into multiple
completions.
15–33.
Chapter 15: Testbench and Design Example
Figure 15–7 on page 15–31
December 2010 Altera Corporation
Root Port BFM
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