IP-AGX-PCIE/4 Altera, IP-AGX-PCIE/4 Datasheet - Page 285
IP-AGX-PCIE/4
Manufacturer Part Number
IP-AGX-PCIE/4
Description
IP CORE - PCI Express X1 And X4 Lanes For Arria GX
Manufacturer
Altera
Datasheet
1.IP-AGX-PCIE1.pdf
(362 pages)
Specifications of IP-AGX-PCIE/4
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
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Figure 16–1. SOPC Builder Example System with Multiple PCI Express IP cores
December 2010 Altera Corporation
December 2010
<edit Part Number variable in chapter>
Memory
System Interconnect Fabric
(SOPC Builder System)
PCIe (Soft IP)
External PHY
Endpoint
Nios II
This design example provides detailed step-by-step instructions to generate an SOPC
Builder system containing the following components:
■
■
■
In the SOPC Builder design flow you select the PCI Express IP core as a component,
which automatically instantiates the PCI Express Compiler’s Avalon-MM bridge
module. This component supports PCI Express ×1 or ×4 endpoint applications with
bridging logic to convert PCI Express packets to Avalon-MM transactions and vice
versa.
created using the SOPC Builder design flow. It shows both the soft and hard IP
implementations with one of the soft IP variants using the embedded transceiver and
the other using a PIPE interface to an external PHY. The design example included in
this chapter illustrates the use of a single hard IP implementation with the embedded
transceiver.
PIPE Interface
Memory
PCI Express ×4 IP core
On-Chip memory
DMA controller
PCI Express Link
Figure 16–1
shows a PCI Express system that includes three different endpoints
Embedded Transceiver Device
Memory
System Interconnect Fabric
(SOPC Builder System)
Root Complex
PCIe (Soft IP)
Endpoint
Switch
Nios II
16. SOPC Builder Design Example
Endpoint
PCI Express Link
Memory
PCI Express Link
Embedded Transceiver Device
Custom
Memory
Logic
System Interconnect Fabric
(SOPC Builder System)
PCI Express Compiler User Guide
PCIe (Hard IP)
Endpoint
Nios II
Memory
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