IP-AGX-PCIE/4 Altera, IP-AGX-PCIE/4 Datasheet - Page 282

• Manufacturer Part Number: IP-AGX-PCIE/4
• Description: IP CORE - PCI Express X1 And X4 Lanes For Arria GX
• Manufacturer: Altera

Specifications of IP-AGX-PCIE/4

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

15–54
Table 15–67.
Table 15–68.
Table 15–69.
PCI Express Compiler User Guide
Arguments
Location
Syntax
Arguments
Location
Syntax
msi_poll Procedure
dma_set_msi Procedure
altpcietb_bfm_driver_chaining.v or altpcietb_bfm_driver_chaining.vhd
dma_set_msi(bar_table, bar_num, bus_num, dev_num, fun_num, direction, msi_address,
msi_data, msi_number, msi_traffic_class, multi_message_enable, msi_expected)
bar_table
bar_num
Bus_num
dev_num
Fun_num
Direction
msi_address
msi_data
Msi_number
Msi_traffic_class
Multi_message_enable
msi_expected
find_mem_bar Procedure
max_number_of_msi
msi_address
msi_expected_dmawr
msi_expected_dmard
Dma_write
Dma_read
altpcietb_bfm_driver_chaining.v
Find_mem_bar(bar_table,allowed_bars,min_log2_size, sel_bar)
dma_set_msi Procedure
The dma_set_msi procedure sets PCI Express native MSI for the DMA read or the
DMA write.
find_mem_bar Procedure
The find_mem_bar procedure locates a BAR which satisfies a given memory space
requirement.
Specifies the number of MSI interrupts to wait for.
The shared memory location to which the MSI messages will be written.
When dma_write is set, this specifies the expected MSI data value for the
write DMA interrupts which is set by the dma_set_msi procedure.
When the dma_read is set, this specifies the expected MSI data value for the
read DMA interrupts which is set by the dma_set_msi procedure.
When set, poll for MSI from the DMA write module.
When set, poll for MSI from the DMA read module.
Address of the endpoint bar_table structure in BFM shared memory.
BAR number to analyze.
Set configuration bus number.
Set configuration device number.
Set configuration function number.
When 0 the direction is read.
When 1 the direction is write.
Specifies the location in shared memory where the MSI message data
will be stored.
The 16-bit message data that will be stored when an MSI message is
sent. The lower bits of the message data will be modified with the
message number as per the PCI specifications.
Returns the MSI number to be used for these interrupts.
Returns the MSI traffic class value.
Returns the MSI multi message enable status.
Returns the expected MSI data value, which is msi_data modified by the
msi_number chosen.
Chapter 15: Testbench and Design Example
December 2010 Altera Corporation
BFM Procedures and Functions