IP-AGX-PCIE/4 Altera, IP-AGX-PCIE/4 Datasheet - Page 240

IP CORE - PCI Express X1 And X4 Lanes For Arria GX

IP-AGX-PCIE/4

Manufacturer Part Number
IP-AGX-PCIE/4
Description
IP CORE - PCI Express X1 And X4 Lanes For Arria GX
Manufacturer
Altera
Datasheet

Specifications of IP-AGX-PCIE/4

Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
15–12
PCI Express Compiler User Guide
as well as other miscellaneous status registers.
altpcierd_dma_dt—This module arbitrates PCI Express packets issued by the
submodules altpcierd_dma_prg_reg, altpcierd_read_dma_requester,
altpcierd_write_dma_requester and altpcierd_dma_descriptor.
altpcierd_dma_prg_reg—This module contains the chaining DMA control
registers which get programmed by the software application or BFM driver.
altpcierd_dma_descriptor—This module retrieves the DMA read or write
descriptor from the BFM shared memory, and stores it in a descriptor FIFO.
This module issues upstream PCI Express TLPs of type Mrd.
altpcierd_read_dma_requester, altpcierd_read_dma_requester_128—For each
descriptor located in the altpcierd_descriptor FIFO, this module transfers data
from the BFM shared memory to the endpoint memory by issuing MRd PCI
Express transaction layer packets. altpcierd_read_dma_requester is used with
the 64-bit Avalon-ST IP core. altpcierd_read_dma_requester_128 is used with
the 128-bit Avalon-ST IP core.
altpcierd_write_dma_requester, altpcierd_write_dma_requester_128—For
each descriptor located in the altpcierd_descriptor FIFO, this module transfers
data from the endpoint memory to the BFM shared memory by issuing MWr
PCI Express transaction layer packets. altpcierd_write_dma_requester is used
with the 64-bit Avalon-ST IP core. altpcierd_write_dma_requester_128 is used
with the 128-bit Avalon-ST IP core.
altpcierd_cpld_rx_buffer—This modules monitors the available space of the
RX Buffer; It prevents RX Buffer overflow by arbitrating memory read request
issued by the application.
altpcierd_cdma_ecrc_check_64, altpcierd_cdma_ecrc_check_128—This
module checks for and flags PCI Express ECRC errors on TLPs as they are
received on the Avalon-ST interface of the chaining DMA.
altpcierd_cdma_ecrc_check_64 is used with the 64-bit Avalon-ST IP core.
altpcierd_cdma_ecrc_check_128 is used with the 128-bit Avalon-ST IP core.
altpcierd_cdma_rx_ecrc_64.v, altpcierd_cdma_rx_ecrc_64_altcrc.v,
altpcierd_cdma_rx_ecrc_64.vo—These modules contain the CRC32 checking
Megafunction used in the altpcierd_ecrc_check_64 module. The .v files are
used for synthesis. The .vo file is used for simulation.
altpcierd_cdma_ecrc_gen—This module generates PCI Express ECRC and
appends it to the end of the TLPs transmitted on the Avalon-ST TX interface of
the chaining DMA. This module instantiates the altpcierd_cdma_gen_ctl_64,
altpcierd_cdma_gen_ctl_128, and altpcierd_cdma_gen_datapath modules.
altpcierd_cdma_ecrc_gen_ctl_64, altpcierd_cdma_ecrc_gen_ctl_128—This
module controls the data stream going to the altpcierd_cdma_tx_ecrc module
for ECRC calculation, and generates controls for the main datapath
(altpcierd_cdma_ecrc_gen_datapath).
altpcierd_cdma_ecrc gen_datapath—This module routes the Avalon-ST data
through a delay pipe before sending it across the Avalon-ST interface to the IP
core to ensure the ECRC is available when the end of the TLP is transmitted
across the Avalon-ST interface.
altpcierd_cdma_ecrc_gen_calc—This module instantiates the TX ECRC core.
Chapter 15: Testbench and Design Example
December 2010 Altera Corporation
Chaining DMA Design Example

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