XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 7

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
AG23
AE19
P
IN
#
S
IGNAL
PCS_L
AS_L
ALE/
N
AME
I/O
I
I
S
T
TTL
TTL
IGNAL
YPE
Address Latch Enable/Address Strobe:
The exact function of this input pin depends upon which mode
the Microprocessor Interface has been configured to operate in,
as described below.
Intel-Asynchronous Mode - ALE
If the Microprocessor Interface (of the XRT94L33) has been
configured to operate in the Intel-Asynchronous Mode, then this
active-high input pin is used to latch the address (present at the
Microprocessor Interface Address Bus input pins (A[14:0]) into
the XRT94L33 Microprocessor Interface block and to indicate the
start of a READ or WRITE cycle.
Pulling this input pin “high” enables the input bus drivers for the
Address Bus input pins (A[14:0]). The contents of the Address
Bus will be latched into the XRT94L33 Microprocessor Interface
circuitry, upon the falling edge of this input signal.
Motorola-Asynchronous (68K) Mode – AS*
If the Microprocessor Interface has been configured to operate in
the Motorola-Asynchronous Mode, then this active-low input pin
is used to latch the data (residing on the Address Bus, A[14:0])
into the Microprocessor Interface circuitry of the XRT94L33.
Pulling this input pin “low” enables the input bus drivers for the
Address Bus input pins. The contents of the Address Bus will be
latched into the Microprocessor Interface circuitry, upon the
rising edge of this signal.
PowerPC 403 Mode – No Function – Tie to GND:
If the MIcroprocessor Interface has been configured to operate in
the PowerPC 403 Mode, then this input pin has no role nor
function and should be tied to GND.
Chip Select Input:
The user must assert this active low signal in order to select the
Microprocessor Interface for READ and WRITE operations
between the Microprocessor and the XRT94L33 on-chip
registers, LAPD and Trace Buffer locations.
7
D
ESCRIPTION
XRT94L33
Rev.1.2.0.