XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 255

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

xr
XRT94L33
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Rev.1.2.0.
• The ten pointer value bits (within the H1 and H2 bytes) will be set to the value that was written into the
“Transmit STS-3c Path – Transmit Arbitrary H1 Byte Pointer” and “Transmit STS-3c Path – Transmit Arbitrary
H2 Byte Pointer” registers; during STEP 1.
• Afterwards, the N-bits will resume their normal value of “0110”, and this new pointer value will be used as
the new pointer, from this point on.
Note:
Once the user writes a “1” into Bit 0 (Insert Single NDF Event), the XRT94L33 will automatically clear this bit-
field. Hence, there is no need to subsequently reset this bit-field to “0”.
2.2.8
T
SONET POH PROCESSOR BLOCK (
ATM/PPP
STS-3 A
)
RANSMIT
FOR
OVER
PPLICATIONS
All outbound ATM cells that exit the Transmit ATM Cell Processor block will be routed to the Transmit SONET
POH Processor block, where they will be mapped into either STS-1 SPEs. Likewise, all outbound PPP
packets that exit the Transmit PPP Packet Processor block will be routed to the Transmit SONET POH
Processor block, where they will be mapped into STS-1 SPEs. The purpose of the Transmit SONET POH
Processor block is to accomplish the following.
• To accept ATM cells from the Transmit ATM Cell Processor block and to map these cells into STS-1 SPE
(Synchronous Payload Envelope), or
• To accept PPP packets from the Transmit PPP Packet Processor block and to map these packets into
STS-1 SPEs
• To compute and insert the B3 (Path BIP-8) byte
• To deliberately transmit an STS-1 SPE with an erred B3 byte (for testing purposes)
• To source the J1, C2, G1, F2, H4, Z3, Z4 and Z5 bytes.
• To automatically transmit the RDI-P (Path – Remote Defect) Indicator whenever (and for the duration that)
the corresponding Receive SONET POH Processor block declares the AIS-P, LOP-P, UNEQ-P, TIM-P or
PLM-P defect conditions.
• To automatically transmit the RDI-P indicator whenever (and for the duration that) the corresponding
Receive ATM Cell Processor block declares the LCD defect condition.
• To transmit the RDI-P Indicator upon Software Control.
• To automatically transmit the REI-P (Path – Remote Error) Indicator anytime the corresponding Receive
SONET POH Processor block detects B3 byte errors in its incoming STS-1 SPE data-stream.
• To transmit the REI-P indicator upon Software Control.
• To transmit the AIS-P (Path – Alarm Indication Signal) Indicator upon Software Control.
• To permit the user to transmit either 1 byte, 16 byte or 64 byte Path Trace Messages to the remote PTE.
• To force “positive-stuff” pointer adjustments in the outbound STS-1 data-stream.
• To force “negative-stuff” pointer adjustments in the outbound STS-1 data-stream.
• To force single and continuous NDF (New Data Flag) events into the outbound STS-1 data-stream
• To route its output data to the Transmit STS-1 TOH Processor block for further processing.
Figure 46presents an illustration of the block diagram of the XRT94L33 Mapper IC, with the “Transmit SONET
POH Processor” block highlighted.
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