XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 296

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
2.2.9
The purpose of the Transmit STS-3 TOH Processor Block is to accomplish the following.
• To accept STS-3c SPE data from the Transmit STS-3c POH Processor Block (for STS-3c Applications)
• To accept 3 channels of STS-1 SPE data from each of the three (3) Transmit SONET POH Processor
blocks (for STS-3 Applications)
• To compute and insert the B1 (Section BIP-8) and B2 (Line BIP-8) bytes.
• To source the K1/K2, E1, M0, J0, F1 and S1 bytes.
• To transmit the RDI-L (Line – Remote Defect Indicator) Indicator.
• To transmit the REI-L (Line – Remote Error Indicator) Indicator.
• To transmit the AIS-L (Line – Alarm Indication Signal) Indicator
• To deliberately transmit an erred B1 or B2 byte (for testing purposes)
• To optionally scramble the outbound STS-3 data.
• To output this data to either the Transmit PECL Interface or the Transmit STS-3 Telecom Bus Interface, for
transmission to the remote terminal equipment.
Figure 57 presents an illustration of the Functional Block Diagram of the XRT94L33 ATM UNI/PPP/Mapper IC
with the Transmit STS-3 TOH Processor block highlighted.
Figure 57: Illustration of the Functional Block Diagram of the XRT94L33 ATM UNI/PPP/Mapper IC with
the Transmit STS-3 TOH Processor Block highlighted
SOME BACKGROUND INFORMATION ON THE TRANSPORT OVERHEAD (TOH) BYTES
As mentioned earlier, the XRT94L33 will handle either STS-1 frame, STS-3c frames, or STS-3. The size of
an STS-3 frame is 9 rows by 270 byte columns.
Figure 58 presents a simple illustration of the STS-3 Frame.
TRANSMIT STS-3 TOH PROCESSOR BLOCK
XRT95L34 – Channel 0
STS-3/12
Interface
STS-3/12
Interface
Telecom
STS-3/12
Interface
STS-3/12
Telecom
Interface
STS-3/12
PECL
Block
Block
STS-3/12
PECL
Block
Block
Block
Bus
CDR
Block
Bus
CDR
Processor
Transmit
STS-3/12
Processor
Processor
Transmit
STS-3/12
STS-3/12
Processor
Block
Receive
STS-3/12
TOH
Receive
Microprocessor
Block
Block
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
TOH
TOH
Microprocessor
Block
TOH
Interface
Interface
Block
Block
Processor
Processor
Transmit
STS-3/12
STS-3/12
Processor
Processor
Transmit
Receive
STS-3/12
STS-3/12
Receive
Block
Block
POH
POH
Block
Block
Synthesizer
POH
POH
296
Synthesizer
Clock
Block
Clock
Block
Cell Processor
Cell Processor
Cell Processor
Cell Processor
Processor
Processor
Transmit
Processor
Processor
Transmit
Transmit
Receive
Receive
Transmit
Block
Receive
Block
Receive
Block
ATM
PPP
PPP
Block
Block
Block
ATM
Block
ATM
PPP
PPP
Block
ATM
POS-PHY
POS-PHY
UTOPIA/
Transmit
UTOPIA
Interface
Transmit
Interface
Interface
Interface
POS-PHY
POS-PHY
UTOPIA/
Transmit
Transmit
Receive
Receive
UTOPIA
Interface
Interface
Interface
Interface
Block
Block
Receive
Block
Receive
Block
xr
Block
Block
Block
Block