XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 10

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
AE27
P
U2
U1
T2
P3
IN
#
RXCLK_19MHZ
RXLDAT_R_P
RXLDAT_R_N
S
RXLDAT_N
REFCLK_P
IGNAL
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
N
AME
I/O
O
I
I
I
I
LVPECL
LVPECL
LVPECL
LVPECL
S
CMOS
T
IGNAL
YPE
Receive STS-3/STM-1 Data – Negative Polarity PECL Input:
This input pin, along with RXLDAT_P functions as the
Recovered Data Input, from the Optical Transceiver or as the
Receive Data Input from the system back-plane.
Note:
Receive STS-3/STM-1 Data – Positive Polarity PECL Input –
Redundant Port:
This input pin, along with “RXLDAT_R_N” functions as the
Recovered Data Input, from the Optical Transceiver or as the
Receive Data Input from the system back-plane.
Note:
Receive STS-3/STM-1 Data – Negative Polarity PECL Input –
Redundant Port:
This input pin, along with “RXLDAT_R_P” functions as the
Recovered Data Input, from the Optical Transceiver or as the
Receive Data Input from the system back-plane.
Note:
19.44MHz Recovered Output Clock:
This pin outputs a 19.44MHz clock signal that has been derived
from the incoming STS-3/STM-1 line signal (via the Receive
STS-3/STM-1 Clock and Data Recovery PLL).
If the user wishes to operate the STS-3/STM-1 Interface in the
“loop-timing” mode, then the user should route this particular
signal through a “narrow-band” PLL (in order to attenuate any
jitter within this signal) prior to routing it to the REFTTL input pin.
Transmit Reference Clock – Positive Polarity PECL Input:
This input pin, along with “REFCLK_N” and “REFTTL” can be
configured to function as the timing source for the STS-3/STM-1
Transmit Interface Block.
If the user configures these two input pins to function as the
timing source, then the user must apply a 155.52MHz clock
signal, in the form of a PECL signal to these input pins. The user
can configure these two inputs to function as the timing source
by writing the appropriate data into the “Transmit Line Interface
Control Register “ (Address Location = 0x0383)
Note:
10
Users should set this pin to “1” if “REFTTL” clock input
this input pin, along with “RXLDAT_P” functions as the
“Primary Receive STS-3/STM-1 Data Input Port”
this input pin, along with “RXLDAT_R_N” functions as
the “Redundant Receive STS-3/STM-1 Data Input
Port”.
this input pin, along with “RXLDAT_R_N” functions as
the “Redundant Receive STS-3/STM-1 Data Input
Port”.
is used
For APS (Automatic Protection Switching) purposes,
For APS (Automatic Protection Switching) purposes,
For APS (Automatic Protection Switching) purposes,
D
ESCRIPTION
xr