XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 404

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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XRT94L33
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Rev.1.2.0.
Figure 98 Cell Delineation Algorithm Employed by the Receive ATM Cell Processor block
Correct HEC
HUNT
Incorrect HEC
PRESYNC
ALPHA Consecutive
Incorrect HEC
DELTA Consecutive Correct
HEC at 53 Byte Intervals
SYNC
The HUNT State
When the XRT94L33 is first powered up and is configured in the ATM Mode, then the HEC Byte Verification
block will initially be operating in the “HUNT” state. While the HEC Byte Verification block is operating in the
“HUNT” state, it has no knowledge of the location of the boundaries of the incoming cells. In the HUNT state,
the HEC Byte Verification block is searching through the incoming (“unframed”) cell data-stream for a possible
valid cell header pattern (e.g., one that does not produce a HEC byte error). Therefore, while in this state, the
HEC Byte Verification will read in five octets of the data that it receives from the Receive STS-3c POH
Processor block. The HEC Byte Verification block will then compute a “HEC byte value” based upon the first
four of these five octets. The HEC Byte Verification block will then compare this internally computed value
th
with that of the 5
“read-in” octet. If the two values are not the same, then the HEC Byte Verification block will
conclude that it has not located the boundaries of the ATM cells within the incoming data-stream and will
increment its sampling set (of the 5 bytes, within the incoming data-stream) by one bit, and will repeat the
above-mentioned process with this new set of “candidate” header bytes. In other words, the HEC Byte
Verification block obtains its next selection of five octets, 53 bytes and 1 bit later.
If the HEC Byte Verification block comes across a set of five octets, that are such that the computed HEC
th
byte value does match the 5
(read in) octet, then the HEC Byte Verification block will transition into the
PRESYNC state.
The PRE-SYNC State
The HEC Byte Verification block will transition from the “HUNT” state to the “PRESYNC” state; when it has
located an “apparently” valid set of cell header bytes. However, it is possible that the HEC Byte Verification
block is being “fooled” by user data that simply mimics the cell header byte pattern. Therefore, further
evaluation is required in order to confirm that this set of five octets are truly valid cell header bytes. The
purpose of the “PRE-SYNC” state is to facilitate this further evaluation.
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