XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 139

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
1.4.1
When any of the conditions, presented in Figure 6 occurs (if their Interrupt is enabled), then the XRT94L33
will generate an interrupt request to the µP/µC by asserting the active-low interrupt request output pin, INT*.
Shortly after the µP/µC has detected the activated INT* signal, it will enter into the appropriate “user-supplied”
interrupt service routine. The first task, for the µP/µC, while running this interrupt service routine, may be to
isolate the source of the interrupt request down to the device level (e.g., the XRT94L33 ATM UNI/PPP
device), if multiple peripheral devices exist in the user’s system.
However, once the “interrupting peripheral” device has been identified and determined to be the XRT94L33,
the next task for the µP/µC is to identify the functional block within the XRT94L33 requested the interrupt.
Finally, the µP/µC will need to proceed further and identify the exact condition(s) causing the interrupt to be
generated by the XRT94L33.
The procedure for servicing the “XRT94L33” Interrupts is best achieved by executing the following steps.
STEP 1 – DETERMINE THE FUNCTIONAL BLOCK(S) REQUESTING THE INTERRUPT
If the interrupting device turns out to be the XRT94L33 ATM UNI/PPP IC, then the µC/µP must determine
which “functional block” requested the interrupt. Hence, upon reaching this state, one of the very first things
that the µC/µP must do within the user supplied “XRT94L33” interrupt service routine, is to perform a read of
both of the following registers.
• Operation Block Interrupt Status Register – Byte 1 (Address = 0x0112)
• Operation Block Interrupt Status Register – Byte 0 (Address = 0x0113)
The bit-format of each of these registers is presented below.
Operation Block Interrupt Status Register – Byte 1 (Address Location = 0x0112)
Operation Block Interrupt Status Register – Byte 0 (Address Location = 0x0113)
Op Control
Processor
ATM Cell
Interrupt
Interrupt
Receive
Status
Status
Block
Block
B
B
R/O
R/O
IT
IT
0
0
7
7
G
ENERAL
STS-3 TOH
Processor
Interrupt
Interrupt
Receive
DS3/E3
Mapper
Status
Status
Block
Block
B
B
R/O
R/O
IT
IT
0
0
F
6
6
LOW OF
Processor
XRT94L33 ATM UNI/PPP D
SONET/
Interrupt
Receive
Unused
STS-3c
Status
Block
B
POH
B
R/O
R/O
IT
IT
0
0
5
5
STS-1 TOH
Processor
Processor
Interrupt
Receive
Interrupt
Receive
Status
Status
Block
Block
B
B
PPP
R/O
R/O
IT
IT
0
0
4
4
139
STS-1 POH
Processor
Processor
EVICE
ATM Cell
Transmit
Interrupt
Interrupt
Receive
Status
Status
Block
Block
B
B
R/O
R/O
IT
IT
0
0
3
3
I
NTERRUPT
Interrupt
DS3/E3
Framer
Status
Block
B
B
R/O
R/O
S
IT
0
IT
0
ERVICING
2
2
Unused
Interface
Interrupt
Receive
Status
Block
B
B
Line
R/O
R/O
IT
IT
0
0
1
1
XRT94L33
Processor
Transmit
Interrupt
Unused
Status
Rev.1.2.0.
Block
B
B
PPP
R/O
R/O
IT
IT
0
0
0
0