XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 122
![no-image](/images/manufacturer_photos/0/2/243/exar_corporation_sml.jpg)
XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
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XRT94L33
Rev.1.2.0.
1.2.8
The purpose of the “Transmit ATM Cell Processor” block is to read out the contents of “user” cells that have
been written into the “TxFIFO” (via the Transmit UTOPIA Interface block); and perform the following functions.
• Optionally Compute and Verify the HEC byte of each cell written into the “Transmit Cell Buffer”
• To optionally discard all incoming ATM cells that contain HEC byte errors.
• Optionally Compute and Insert the HEC byte into the fifth octet position, within each cell written into the
“Transmit ATM Cell Buffer”.
• To optionally filter User Cells (that are read out from the TxFIFO) by either discarding these User Cells, or
by replicating them and routing the copies of these cells to the Transmit Cell Extraction Buffer.
• To insert cells (residing within the Transmit Cell Insertion Buffer) into the Transmit Data Path anytime the
TxFIFO is depleted of user cells.
• Generate Idle Cells, anytime the TxFIFO and the Transmit Cell Insertion Buffer are depleted of “User” cells.
• To route the composite stream of “valid” and “idle” cells to the Transmit SONET POH Processor Block.
1.2.9
The purpose of the “Transmit SONET POH Processor” block is to perform the following functions.
• To receive ATM Cell or PPP data from its corresponding Transmit ATM Cell Processor or Transmit PPP
Packet Processor blocks and to map this data into an STS-1 SPE data-stream.
•
conditions, by the corresponding Receive SONET POH Processor block.
• To automatically transmit the RDI-P indicator (to the remote PTE) anytime (and for the duration that) the
corresponding Receive ATM Cell Processor block declares the LCD-P (Loss of Cell Delineation) defect
condition.
• To transmit the RDI-P indicator upon software control.
• To transmit the REI-P indicator (to the remote PTE) upon detection of B3 byte errors by the corresponding
Receive SONET POH Processor block.
• To transmit the REI-P indicator upon software control.
• To compute the BIP-8 value over the entire STS-1 SPE and to insert this value into the “B3-byte” position
within the very next outbound STS-1 SPE.
• To transmit the AIS-P indicator (under software control).
To automatically transmit the RDI-P indicator (to the remote PTE) upon detection of the following
a. AIS-P
b. LOP-P
c. UNEQ-P
d. PLM-P
e. TIM-P
T
T
HE
HE
T
T
RANSMIT
RANSMIT
ATM C
SONET POH P
ELL
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
P
ROCESSOR
ROCESSOR
B
LOCK
B
LOCK
122
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