XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 184

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
XRT94L33
Rev.1.2.0.
2.2.6.6
The four User Cell Filter – Check Registers permit the user to specify which bits (within the Header bytes of
User Cells) will be checked and compared with the contents of the “User Cell Filter – Pattern Registers”.
There are four (4) “User Cell Filter-Check” Registers (one for each of the four header bytes within an ATM
cell). Setting a particular bit-field to “0” configures the “Transmit User Cell Filter” to NOT compare the
corresponding bit-field (within the header bytes of the incoming user cell) to the corresponding bit-value,
within the User Cell Filter – Pattern Register; during User Cell pattern checking. Conversely, setting a
particular bit-field to “1” configures the “Transmit User Cell Filter” to compare the corresponding bit-field
(within the header bytes of the incoming user cell) to the corresponding bit-value, within the User Cell Filter –
Pattern Register; during User Cell pattern checking.
For example, if the user were write the value “0x00” into a given “User Cell Filter – Check Register”, then the
Transmit User Cell Filter will NOT check and compare the value of the corresponding header byte, within an
incoming User Cell; to the contents of the corresponding “User Cell Filter – Pattern” register during User Cell
pattern checking. Conversely, if the user were to write the value “0xFF” into a given “User Cell Filter – Check
Register”, then the User Cell Filter will check and compare all eight bits (within the corresponding byte) within
an incoming User Cell; to the contents of the corresponding “User Cell Filter – Pattern” register during User
Cell pattern checking.
The bit-format of the four “User Cell Filter – Check Registers” is presented below.
Transmit ATM Filter # 0, # 1, # 2, # 3 Check – Header Byte 1 (Address = 0xNF48, 0xNF58, 0xNF68,
0xNF78)
Transmit ATM Filter # 0, # 1, # 2, # 3 Check – Header Byte 2 (Address = 0xNF49, 0xNF59, 0xNF69,
0xNF79)
Transmit ATM Filter # 0, # 1, # 2, # 3 Check – Header Byte 3 (Address = 0xNF4A, 0xNF5A, 0xNF6A,
0xNF7A)
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
7
7
7
T
RANSMIT
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
6
6
6
U
SER
C
ELL
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
F
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
5
ILTER
User Cell Filter Check – Header Byte 1[7:0]
User Cell Filter Check – Header Byte 2[7:0]
User Cell Filter Check – Header Byte 3[7:0]
– C
HECK
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
4
4
4
R
EGISTERS
184
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
3
3
3
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
2
2
2
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
1
1
1
xr
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
0
0
0

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