XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 217

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
2.2.7.1
The Transmit STS-3c POH Processor block receives ATM cell data from the Transmit ATM Cell Processor
block; and maps this data into an STS-3c SPE.
As the Transmit STS-3c POH Processor block receives this ATM Cell data from the Transmit ATM Cell
Processor block, it will perform the following functions.
Each of these functions is described in detail below.
2.2.7.2
The Transmit STS-3c POH Processor block creates STS-3c SPE data and computes a BIP-8 value over this
STS-3c SPE. The results of this calculation are inserted into the B3 byte-position within the very next STS-3c
SPE.
checking/detection on the incoming STS-3c SPE data that it receives.
TRANSMISSION OF ERRED B3 BYTES IN THE OUTBOUND STS-3c DATA-STREAM
The Transmit STS-3c POH Processor block permits the user to insert errors into the “B3 Bytes”, within the
outbound STS-3c SPE data-stream.
The user can accomplish this by writing a non-zero value into the “Transmit STS-3c Path – Transmitter B3
Byte Error Mask” Register. The “Transmit STS-3c POH Processor block will perform an XOR operation with
the contents of the “outbound” B3 byte, and the contents of this register. The results of this calculation are
written back into the B3 byte position, within the outbound STS-3c SPE data-stream.
The bit-format of the “Transmit STS-3c Path – Transmit B3 Byte Error Mask” register is presented below.
Transmit STS-3c Path – Transmitter B3 Byte Error Mask Register (Address = 0x1997)
Note:
B
R/W
It will map these ATM cells into the payload bytes, within the STS-3c SPE.
Compute and insert the B3 byte
Source (per user configuration) the J1, C2, G1, F2, H4, Z3, Z4 and Z5 bytes
To (automatically or upon software command) transmit the RDI-P (Path – Remote Defect Indicator)
indicator
To (automatically or upon software command) transmit the REI-P (Path – Remote Error Indicator)
indicator
To (upon software command) transmit the AIS-P (Path – Alarm Indication Signal) indicator
To (upon software command) force pointer-adjustment or NDF (New Data Flag) events into the outbound
STS-3c data-stream.
IT
0
7
The Remote PTE (Path Terminating Equipment) will use this byte, in order to perform error-
For normal (e.g., un-erred) operation, the user should ensure that this register is set to “0x00” (the default value).
RECEIVING ATM CELL DATA FROM THE TRANSMIT ATM CELL PROCESSOR BLOCK
COMPUTATION AND INSERTION OF THE PATH BIP-8 (B3) BYTE
B
R/W
IT
0
6
B
R/W
IT
0
5
Transmit_B3_Byte_Mask[7:0]
B
R/W
IT
0
4
217
B
R/W
IT
0
3
B
R/W
IT
0
2
B
R/W
IT
0
1
XRT94L33
Rev.1.2.0.
B
R/W
IT
0
0

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