XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 162

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
XRT94L33
Rev.1.2.0.
XRT94L33 is operating in the Multi-PHY mode, the Transmit UTOPIA Interface block will support two kinds of
operations with the ATM Layer processor:
Each of these operations is discussed in the sections below. However, prior to discussing each of these
operations, the reader must understand the following.
“Multi-PHY” operation involves the use of one (1) ATM Layer processor and several UNI (or PHY-Layer)
devices, within a system. The ATM Layer processor is expected to read/write ATM cell data from/to these
UNI devices.
processor to uniquely identify a particular UNI device (among all of the UNI devices within the “Multi-PHY”
system) that it wishes to “poll”, write ATM cell data to, or read ATM cell data from. Actually, “Multi-PHY”
operation provides an addressing scheme allows the ATM Layer processor to uniquely identify “UTOPIA
Interface Blocks” (e.g., Transmit and Receive) within all of the UNI devices, operating in the “Multi-PHY”
system. In order to uniquely identify a given “UTOPIA Interface block”, within a “Multi-PHY” system, each
“Transmit and Receive UTOPIA Interface Blocks are assigned a 5-bit “UTOPIA address” value. The user
assigns this address value to a particular “Transmit UTOPIA Interface block” by writing this address value into
the “Transmit UTOPIA Address Register” (Address = 0x0593) and appropriate data into the “Transmit
UTOPIA Port Address” Register (Address = 0x0597); within its “host” XRT94L33; per the procedure (as
presented below). The bit-format of the “Transmit UTOPIA Address Register” and “Transmit Port Address”
Register is presented below.
Transmit UTOPIA Address Register (Address = 0x0593)
Transmit UTOPIA Port Number Register (Address = 0x0597)
2.2.1.3.7
The XRT94L33 can be configured to function as a three channel ATM UNI over either an STS-3 signal or an
STS-3c. As a consequence, for Multi-PHY Operation, the XRT94L33 can be assigned as many as four
“Transmit UTOPIA Addresses” at a given time (one for each STS-1 channel).
The user can assign a “Transmit UTOPIA Address” value to a given channel, within the XRT94L33 by
executing the following steps.
STEP 1 – Assign a “Transmit UTOPIA Address” to Channel 0
The user can accomplish this by doing the following.
STEP 1a – Set Bits 0 through 4 (“Tx_UTOPIA_Port_Number[4:0]”) within the “Transmit UTOPIA Port
Number Register” to “0x00”; as depicted below.
B
B
Polling for “available” UNI (PHY Layer) devices.
Selecting which UNI (out of several possible UNI devices) to write ATM cell data to.
R/O
RO
IT
IT
0
0
7
7
Assigning Transmit UTOPIA Addresses to Each STS-3c Channel within the XRT94L33
Hence, “Multi-PHY” operation requires, at a minimum, some means for the ATM Layer
Unused
Unused
B
B
R/O
RO
IT
IT
0
0
6
6
B
B
R/O
RO
IT
IT
0
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
B
B
R/W
R/W
IT
IT
X
X
4
4
162
B
B
R/W
R/W
IT
X
IT
X
Tx_UTOPIA_Port_Number[4:0]
3
3
Tx_UTOPIA_Addr[4:0]
B
B
R/W
R/W
IT
IT
X
X
2
2
B
B
R/W
R/W
IT
X
IT
X
1
1
xr
B
B
R/W
R/W
IT
IT
X
X
0
0

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