XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 154

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
Transmit UTOPIA Control Register – Byte 0, Address = 0x0583
Setting this bit-field to “0” configures the Transmit UTOPIA Interface block to support “UTOPIA Level 3”
signaling. Conversely, setting this bit-field to “1” configures the Transmit UTOPIA Interface block to support
the “UTOPIA Levels 1 and 2” form of signaling. A description of the operation of the Transmit UTOPIA
Interface block, for UTOPIA Level 1, 2 and 3 operation is presented below.
2.2.1.3
This section presents an in-depth write up of the UTOPIA Level 1 and 2 protocols.
When the Transmit UTOPIA Interface block has been configured to operate in the “UTOPIA Level 2” Mode,
then it will either be configured to operate in the “Single-PHY” or “Multi-PHY” mode, as described below.
2.2.1.3.1
The user can configure the width of the Transmit UTOPIA Data bus to be either 8 or 16 bits by writing the
appropriate data into Bits 3 and 2 (Transmit UTOPIA Data Bus Width[1:0]) within the “Transmit UTOPIA
Control” Register, as depicted below.
Transmit UTOPIA Control Register – Byte 0, Address = 0x0583
If the user chooses a UTOPIA Data Bus width of 8 bits, then only the Transmit UTOPIA Data inputs:
TxUData[15:8] will be active. (The input pins: TxUData[7:0] will not be active). If the user chooses a UTOPIA
Data bus width of 16 bits, then all of the Transmit UTOPIA Data inputs: TxUData[15:0] will be active. The
following table relates the value of Bits 2 and 3 (Transmit UTOPIA Data Bus Width[1:0]) within the Transmit
UTOPIA Control Register, to the corresponding width of the Transmit UTOPIA Data bus.
Note:
UTOPIA
UTOPIA
Disable
Level 3
Level
B
B
R/W
R/W
IT
IT
X
1
7
7
This configuration setting does not apply to the Receive UTOPIA Interface block. The user will still need to
specify the width of the Receive UTOPIA Data Bus, separately, as described in Section _.
UTOPIA L
Selecting the UTOPIA Data Bus Width
Multi-PHY
Multi-PHY
Mode
Mode
B
B
R/W
R/W
IT
IT
0
0
6
6
EVEL
1
Back Polling
Back Polling
AND
Back-to-
Back-to-
Enable
Enable
B
B
R/W
R/W
IT
IT
0
0
2 O
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
PERATION OF THE
Access
Access
Status
Status
Direct
Direct
B
B
R/W
R/W
IT
IT
0
0
4
4
154
T
RANSMIT
Transmit UTOPIA/POS-
B
B
Data Bus Width[1:0]
Data Bus Width[1:0]
R/W
R/W
Transmit UTOPIA
IT
X
IT
X
3
3
UTOPIA I
PHY
B
B
R/W
R/W
NTERFACE
IT
IT
X
X
2
2
B
LOCK
B
B
R/W
R/W
Cell_Size_Sel[1:0]
Cell_Size_Sel[1:0]
IT
IT
1
1
1
1
xr
B
B
R/W
R/W
IT
IT
1
1
0
0