XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 438

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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XRT94L33
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Rev.1.2.0.
RxUData[15:0] - Receive UTOPIA Data Bus outputs
The ATM Layer Processor will read ATM cell data from the Receive UTOPIA Interface block in a byte-wide (or
word-wide) manner, via these output pins. The Receive UTOPIA Data bus can be configured to operate in
the “8 bit wide” or “16 bit wide” mode (See Section _). If the “8-bit wide” mode is selected, then only the
RxUData[7:0] output pins will be active and capable of transmitting data. If the 16-bit wide mode is selected,
then all 16 output pins (e.g., RxUData[15:0]) will be active. The Receive UTOPIA Data bus is tri-stated while
the active low RxUEnB* (Receive UTOPIA Bus - Output Enable) input signal is “high”. Therefore, the ATM
Layer Processor must assert this signal (e.g., toggle RxUEnB* low) in order to read the ATM cell data from
the Receive UTOPIA Interface block. The data on the Receive UTOPIA Data Bus output pins are updated on
the rising edge of the Receive UTOPIA Interface block clock signal, RxUClk.
RxUAddr[4:0] - Receive UTOPIA Address Bus inputs
These input pins are used only when the UNI is operating in the Multi-PHY mode. Therefore, for more
information on the Receive UTOPIA Address Bus, please see Section _.
RxUClk - Receive UTOPIA Interface block - Clock Signal input pin
The Receive UTOPIA Interface block uses this signal to update the data on the Receive UTOPIA Data Bus.
The Receive UTOPIA Interface block also uses this signal to sample and latch the data on the Receive
UTOPIA Address bus pins (during Multi-PHY operation), into the Receive UTOPIA Interface block circuitry.
This clock signal can run at frequencies of 25 MHz, 33 MHz, or 50 MHz.
RXUCLKO – RECEIVE UTOPIA INTERFACE BLOCK CLOCK OUTPUT SIGNAL
If the “Receive UTOPIA Clock De-Skewing” PLL is enabled, then the ATM Layer Processor can use to this
signal to sample the contents of the “outbound” ATM cells, as well as to when to assert the UTOPIA Address
(during Multi-PHY operation). Similar to the “RxUClk” signal, this signal can run at frequencies up to 50MHz.
RxUEnB* - Receive UTOPIA Data Bus - Output Enable Input
The Receive UTOPIA Data bus is tri-stated while this input signal is negated. Therefore, the ATM Layer
Processor must assert this “active-low” signal (toggle it “low”) in order to read the byte (or word) from the
Receive UTOPIA Interface block via the Receive UTOPIA Data bus.
RxUPrty - Receive UTOPIA - Odd Parity Bit output pin
The Receive UTOPIA Interface Block will compute the odd-parity of each byte (or word) of ATM cell data that
it will place on the Receive UTOPIA Data bus. The Receive UTOPIA Data bus will output the value of the
computed parity bit at the RxUPrty output pin, while the corresponding byte (or word) is present on the
Receive UTOPIA Data Bus. This features allows the ATM Layer Processor to perform parity checking on the
data that it receives from the Receive UTOPIA Interface Block.
RxUSoC - Receive UTOPIA - “Start of Cell” Indicator output pin
The Receive UTOPIA Interface block will pulse this output signal “high”, for one clock period of RxUClk, when
the first byte (or word) of a new ATM cell is present on the Receive UTOPIA Data Bus. This signal will be
“low” at all other times.
RxUClav/RxEmptyB* - Rx FIFO Cell Available/RxEmpty*
This output signal is used to alert the ATM Layer Processor that the Rx FIFO contains some ATM cell data
that is available for reading. Please see Section _ for more information regarding this signal.
S
UTOPIA L
ELECTING THE
EVEL
The XRT94L33 permits the user to configure the Receive UTOPIA Interface block in either of the following
“UTOPIA Levels”.
• UTOPIA Level 3
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