XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 240

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
the most significant bit) of the “outbound” F2 byte onto the “TxPOH_n” input pin, upon the very next falling
edge of “TxPOHClk_n”. This data bit will be sampled and latched into the “Transmit STS-3c POH Processor”
block circuitry, upon the very next rising edge of “TxPOHClk_n”.
Note:
• Afterwards, the “external circuit” should serially place the remaining seven bits (of the F2 byte) onto the
“TxPOH_n” input pin, upon each of the next seven falling edges of “TxPOHClk_n”.
• The “external circuit” should then revert back to continuously sampling the states of the “TxPOHEnable_n”
and “TxPOHFrame_n” output pins and repeat the above-mentioned process.
Figure 39 presents an illustration of the “TxPOH Input Interface” waveforms, when the “external circuit” is
writing the F2 byte into the “TxPOH Input Port”.
Figure 39 Illustration of the “TxPOH Input Interface” waveforms, when the “External Circuit” is writing
the “F2 byte” into the “TxPOH Input Port”.
2.2.7.3.7
The Transmit STS-3c POH Processor block permits the user to control the value of the H4 byte by either of
the following options.
• Setting and controlling the “outbound” H4 Byte via Software
• Setting and controlling the “outbound” H4 Byte via the “TxPOH Input Port”
The details and instructions for using either or these features are presented below.
2.2.7.3.7.1
The Transmit STS-3c POH Processor block permits the user to specify the contents of the H4 byte, within the
“outbound” STS-3c SPE via software command.
The user can configure the Transmit STS-3c POH Processor block to accomplish this by performing the
following steps.
STEP 1 – Write the value “0” into Bit 0 (H4 Insertion Type) within the “Transmit STS-3c Path – SONET
Control Register – Byte 1”, as depicted below.
Transmit STS-3c Path – SONET Control Register – Byte 1 (Address = 0x1982)
This step configures the Transmit STS-3c POH Processor block to read out the contents of the “Transmit
STS-3c Path – Transmit H4 Byte Value” register; and load this value into the C2 byte position within each
“outbound” STS-3c SPE.
STEP 2 – Write the desired byte value (for the outbound H4 byte) into the “Transmit STS-3c Path –
Transmit H4 Byte Value” register.
The bit-format of this register is presented below.
B
R/O
IT
0
7
This “WAIT STATE” period is necessary because the F2 byte is the fifth byte within the POH.
SUPPORT/HANDLING OF THE H4 BYTE
Setting and Controlling the Outbound H4 Byte via Software
B
R/O
IT
0
6
Unused
B
R/O
IT
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
B
R/O
IT
0
4
240
Z5 Insertion
B
Type
R/W
IT
0
3
Z4 Insertion
B
Type
R/W
IT
0
2
Z3 Insertion
B
Type
R/W
IT
0
1
xr
H4 Insertion
Type
B
R/W
IT
0
0