XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 375

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Receive STS-3 Transport – Receive SF Set Monitor Interval – Byte 1 (Address = 0x1132)
Receive STS-3 Transport – Receive SF Set Monitor Interval – Byte 0 (Address = 0x1133)
Once the user has executed these two steps, then the “SF Declaration Criteria” will be as summarized below.
• B2 Error Threshold = 0x0F (or 15) B2 Errors.
• SF Set Interval = 0x10 (or 16 SONET frame periods)
Hence, the Receive STS-3c TOH Processor block will accumulate B2 errors over 128 (e.g., 8 * 16) SONET
frame periods.
At this point, the Receive STS-3 TOH Processor block will proceed to count B2 errors. Anytime the Receive
STS-3 TOH Processor block detects 15 or more B2 errors, within a 16ms period (e.g., 128 SONET frame
periods); then it will declare the SF condition.
Occurrence whenever the Receive STS-3 TOH Processor block declares the SF Condition
Anytime the Receive STS-3 TOH Processor block declares the SF Condition, then it will do the following.
Note:
Receive STS-3 Transport Interrupt Status Register – Byte 0 (Address = 0x110B)
as depicted below.
Receive STS-3 Transport Status Register – Byte 0 (Address = 0x1107)
Change of
Condition
Interrupt
It will generate the “Change of SF Condition” Interrupt
It will set Bit 4 (SF Detected), within the “Receive STS-3c Transport Status Register – Byte 0” to “1”,
Status
B
B
B
B
RUR
R/W
R/W
R/W
SF
IT
IT
IT
IT
0
0
0
1
7
7
7
7
The Receive STS-3 TOH Processor block will indicate that it is generating this interrupt by toggling the “INT*”
output pin “low” and by setting the “Change of SF Condition Interrupt Status” bit to “1”, as depicted below.
Change of
Condition
Interrupt
Status
B
B
B
B
RUR
R/W
R/W
R/W
SD
IT
IT
IT
IT
0
0
0
0
6
6
6
6
REI-L Error
Interrupt
Status
B
B
B
B
RUR
R/W
R/W
R/W
IT
IT
IT
IT
0
0
0
0
5
5
5
5
SF_SET_MONITOR_WINDOW[23:16]
SF_SET_MONITOR_WINDOW[15:8]
SF_SET_MONITOR_WINDOW[7:0]
B2 Error
Interrupt
Status
B
B
B
B
RUR
R/W
R/W
R/W
IT
IT
IT
IT
0
0
1
0
4
4
4
4
375
B1 Error
Interrupt
Status
B
B
B
B
RUR
R/W
R/W
R/W
IT
IT
IT
IT
0
0
0
0
3
3
3
3
Change of
Condition
Interrupt
Status
B
B
B
B
RUR
R/W
R/W
R/W
LOF
IT
IT
IT
IT
0
0
0
0
2
2
2
2
Interrupt
Status
B
B
B
B
RUR
R/W
R/W
R/W
SEF
IT
IT
IT
IT
0
0
0
0
1
1
1
1
XRT94L33
Change of
Condition
Interrupt
Status
Rev.1.2.0.
B
B
B
B
RUR
R/W
R/W
R/W
LOS
IT
IT
IT
IT
0
0
0
0
0
0
0
0

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