XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 238

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
XRT94L33
Rev.1.2.0.
2.2.7.3.6
The Transmit STS-3c POH Processor block permits the user to control the value of the F2 byte by either of
the following options.
• Setting and controlling the “outbound” F2 Byte via Software
• Setting and controlling the “outbound” F2 Byte via the “TxPOH Input Port”
The details and instructions for using either or these features are presented below.
2.2.7.3.6.1
The Transmit STS-3c POH Processor block permits the user to specify the contents of the F2 byte, within the
“outbound” STS-3c SPE via software command.
The user can configure the Transmit STS-3c POH Processor block to accomplish this by performing the
following steps.
STEP 1 – Write the value “0” into Bit 7 (F2 Insertion Type) within the “Transmit STS-3c Path – SONET
Control Register – Byte 0”, as depicted below.
Transmit STS-3c Path – SONET Control Register – Byte 0 (Address = 0x1983)
This step configures the Transmit STS-3c POH Processor block to read out the contents of the “Transmit
STS-3c Path – Transmit F2 Byte Value” register; and load this value into the F2 byte position within each
“outbound” STS-3c SPE.
STEP 2 – Write the desired byte value (for the outbound F2 byte) into the “Transmit STS-3c Path –
Transmit F2 Byte Value” register.
The bit-format of this register is presented below.
Transmit STS-3c Path – Transmit F2 Byte Value Register (Address = 0x19A3)
2.2.7.3.6.2
The Transmit STS-3c POH Processor block permits the user to specify the contents of the F2 byte, within the
“outbound” STS-3c SPE, via data applied to the “TxPOH_n” input pin.
The user can configure the Transmit STS-3c POH Processor block to accomplish this by performing the
following steps.
STEP 1 – Write the value “1” into Bit 7 (F2 Byte Insertion Type) within the “Transmit STS-3c Path –
SONET Control Register – Byte 0”, as depicted below.
F2 Insertion
B
Type
B
R/W
R/W
IT
IT
0
0
7
7
SUPPORT/HANDLING OF THE F2 BYTE
REI-P Insertion Type[1:0]
Setting and Controlling the Outbound F2 Byte via Software
Setting and Controlling the Outbound F2 Byte via the “TxPOH_n Input Port”
B
B
R/W
R/W
IT
IT
0
0
6
6
B
B
R/W
R/W
IT
IT
0
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
Transmit_F2_Byte_Value[7:0]
RDI-P Insertion Type[1:0]
B
B
R/W
R/W
IT
IT
0
0
4
4
238
B
B
R/W
R/W
IT
IT
0
0
3
3
Insertion
C2 Byte
B
Type
B
R/W
R/W
IT
IT
0
0
2
2
Unused
B
B
R/W
R/O
IT
IT
0
0
1
1
xr
Transmit
Enable
AIS-P
B
B
R/W
R/W
IT
IT
0
0
0
0

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