XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 424

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
As a consequence, the user must read out a total of 14 “32-bit” words from the “Receive Cell Extraction”
buffer for each ATM cell that is read out of the Receive Cell Extraction Buffer.
Procedure for Reading a Cell from the “Receive Cell Extraction Buffer”
The user can read an ATM cell from the “Transmit Cell Extraction Buffer” within the Transmit ATM Cell
Processor block, by executing the following steps.
STEP 1 – Flush the contents of the “Receive Cell Extraction Buffer”
This is accomplished by executing a “Transmit Cell Extraction Buffer” RESET. The user can perform this
“Cell Extraction Buffer” RESET by doing the following.
STEP 1a – Write a “0” into Bit 4 (Extraction Memory RESET*) within the “Transmit ATM Cell – Memory
Control” Register; as depicted below.
Receive ATM Cell – Memory Control Register (Address = 0xN713)
STEP 1b – Write a “1” into Bit 4 (Extraction Memory RESET*), within the “Receive ATM Cell – Memory
Control” Register; as depicted below.
B
R/O
IT
0
7
Unused
B
R/O
IT
0
6
B
R/O
IT
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
Cell Payload Bytes (48 Bytes)
User Defined Field (3 Bytes)
Header Bytes (4 Bytes)
HEC Byte (1 Byte)
Extraction
RESET*
Memory
B
R/W
1->0
IT
4
424
Extraction
Memory
CLAV
B
R/W
IT
0
3
Insertion
RESET*
Memory
B
R/W
IT
1
2
Insertion
Memory
ROOM
B
R/W
IT
1
1
xr
Write SoC
Insertion
Memory
B
R/W
IT
0
0