XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 298

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
The bit-format of the “Transmit STS-3 Transport – Transmit B1 Byte Error Mask” Register is presented below.
Transmit STS-3 Transport – Transmit B1 Byte Error Mask Register (Address = 0x1923)
Note:
2.2.9.3
The Transmit STS-3 TOH Processor block also computes the BIP-8 value over the Line Overhead bytes, as
well as the Envelope Capacity. The results of this calculation are inserted into the B2 byte-position within the
very next STS-3 frame. The Remote Terminal Equipment will use to this byte, in order to perform error-
checking/detection in the incoming LOH and Envelope Capacity data that it receives.
TRANSMISSION OF ERRED B2 BYTES IN THE OUTBOUND STS-3c DATA-STREAM
The Transmit STS-3 TOH Processor block permits the user to deliberately insert errors into the B2 bytes,
within the outbound STS-3 data-stream.
The user can accomplish this by writing a “non-zero” value into the “Transmit STS-3 Transport – Transmit B2
Bit Error Mask” register. The Transmit STS-3 TOH Processor block will perform an XOR operation with the
contents of the “outbound” B2 byte value and the contents of this register. The results of this calculation are
loaded back into the B2 byte position(s), within the “outbound” STS-3 data-stream.
The bit-format of the “Transmit STS-3 Transport – Transmit B2 Bit Error Mask” Register is presented below.
Transmit STS-3 Transport – Transmit B2 Bit Error Mask Register (Address = 0x192B)
Note:
2.2.9.4
To be provided in the next revision of the Data Sheet.
B
B
R/W
R/W
IT
IT
0
0
7
7
For normal (e.g., un-erred) operations, the user should ensure that this register is set to “0x00” (the default
For normal (e.g., un-erred) operations, the user should ensure that this register is set to “0x00” (the default
value).
value).
COMPUTATION AND INSERTION OF THE LINE BIP-8 (B2) BYTE
TRANSMISSION OF ERRED FRAMING ALIGNMENT BYTES IN THE OUTBOUND STS-3
DATA-STREAM
B
B
R/W
R/W
IT
IT
0
0
6
6
B
B
R/W
R/W
IT
IT
0
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
Transmit_B2_Error_Mask[7:0]
B1_Byte_Error_Mask[7:0]
B
B
R/W
R/W
IT
IT
0
0
4
4
298
B
B
R/W
R/W
IT
IT
0
0
3
3
B
B
R/W
R/W
IT
IT
0
0
2
2
B
B
R/W
R/W
IT
IT
0
0
1
1
xr
B
B
R/W
R/W
IT
IT
0
0
0
0