HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 517

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

A.1
Instructions executed by the CPU core are described in alphabetical order.
Table A.1
Instruction
ADD
ADD
ADDC
ADDV
AND
AND
AND.B #imm,@(R0,
BF
BF/S
BRA
BRAF
BSR
BSRF
BT
BT/S
#imm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
#imm,R0
Rm,Rn
GBR)
label
label
label
Rm
label
Rm
label
label
CPU Instructions
CPU Instructions in Alphabetical Order
Appendix A CPU Instructions
Operation
Rn + imm
Rn + Rm
Rn + Rm + T
Rn + Rm
R0 & imm
Rn & Rm
(R0 + GBR) & imm
GBR)
If T = 0, disp
if T = 1, nop
If T = 0, disp
if T = 1, nop
Delayed branch, disp
Delayed branch, Rm + PC
PC
Delayed branch, PC
disp
Delayed branch, PC
Rm + PC
If T = 1, disp
if T = 0, nop
If T = 1, disp
if T = 0, nop
PC
2 + PC
Rn
Rn, Overflow
Rn
PC
Rn
R0
2 + PC
2 + PC
2 + PC
2 + PC
Rn, Carry
PC
(R0 +
2 + PC
PR,
PR,
PC;
PC;
PC;
PC;
T
T
Rev. 5.00 Jun 30, 2004 page 501 of 512
Code
0111nnnniiiiiiii 1
0011nnnnmmmm1100 1
0011nnnnmmmm1110 1
0011nnnnmmmm1111 1
11001001iiiiiiii 1
0010nnnnmmmm1001 1
11001101iiiiiiii 3
10001011dddddddd 3/1*
10001111dddddddd 2/1*
1010dddddddddddd 2
0000mmmm00100011 2
1011dddddddddddd 2
0000mmmm00000011 2
10001001dddddddd 3/1*
10001101dddddddd 2/1*
Appendix A CPU Instructions
REJ09B0171-0500O
Cycles
1
1
1
1
T Bit
—
—
Carry
Over-
flow
—
—
—
—
—
—
—
—
—
—
—