HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 177

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.1.19
Description: Uses single-step division to divide one bit of the 32-bit data in general register Rn
(dividend) by Rm data (divisor). It finds a quotient through repetition either independently or used
in combination with other instructions. During this repetition, do not rewrite the specified register
or the M, Q, and T bits.
In one-step division, the dividend is shifted one bit left, the divisor is subtracted and the quotient
bit reflected in the Q bit according to the status (positive or negative). To find the remainder in a
division, first find the quotient using a DIV1 instruction, then find the remainder as follows:
Zero division, overflow detection, and remainder operation are not supported. Check for zero
division and overflow division before dividing.
Find the remainder by first finding the sum of the divisor and the quotient obtained and then
subtracting it from the dividend. That is, first initialize with DIV0S or DIV0U. Repeat DIV1 for
each bit of the divisor to obtain the quotient. When the quotient requires 17 or more bits, place
ROTCL before DIV1. For the division sequence, see the following examples.
Format
DIV1 Rm,Rn 1 step division
(dividend) – (divisor)
DIV1 (Divide 1 Step): Arithmetic Instruction
Abstract
(Rn ÷ Rm)
Code
0011nnnnmmmm0100 1
(quotient) = (remainder)
Cycle T Bit
Rev. 5.00 Jun 30, 2004 page 161 of 512
Section 6 Instruction Descriptions
Calculation
result
SH-1 SH-2
REJ09B0171-0500O
Instructions
Applicable
SH-
DSP