HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 337

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.3.6
Description: Clears the Dz operand. When conditions are specified for DCT and DCF, the
instruction is executed when those conditions are TRUE. When they are FALSE, the instruction is
not executed.
When conditions are not specified, the DC bit of the DSR register is updated according to the
specifications for the CS bits. The Z bit of the DSR register is set to 1. The N, V, and GT bits are
cleared to 0. If conditions are specified, the DC, N, Z, V, and GT bits are not updated even is the
conditions were true and the instruction was executed.
Operation:
Format
PCLR Dz
DCT PCLR
Dz
DCF PCLR
Dz
/* PCLR Dz
{
unsigned char carry_bit, negative_bit, zero_bit, overflow_bit;
/* ALU Destination assignment */
switch (zzzz) { /* Dz Operand selection bit (zzzz) */
if(DSP_UNCONDITIONAL_UPDATE) { /* unconditional operation */
[if cc] PCLR (Clear): DSP Arithmetic Operation Instruction
break;
break;
Abstract
H'00000000 Dz
if DC = 1, H'00000000 Dz
if 0, nop
if DC = 0, H'00000000 Dz
if 1, nop
case 0x5: A1 = 0x0;
case 0x7: A0 = 0x0;
case 0x8: X0 = 0x0;
A1G = 0x0;
A0G = 0x0;
*/
Code
111110**********
100011010000zzzz
111110**********
100011100000zzzz
111110**********
100011110000zzzz
Rev. 5.00 Jun 30, 2004 page 321 of 512
1
1
1
Cycle
Section 6 Instruction Descriptions
DC Bit
Update
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—
REJ09B0171-0500O
SH-1
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—
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Instructions
Applicable
SH-2
—
—
—
SH-
DSP