HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 233

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.1.40
Description: Performs 16-bit multiplication of the contents of general registers Rn and Rm, and
stores the 32-bit result in the MACL register. The operation is signed and the MACH register data
does not change.
Operation:
Example:
Format
MULS.W
MULS
MULS(long m,long n) /* MULS Rm,Rn */
{
}
MULS R0,R1
STS
MACL=((long)(short)R[n]*(long)(short)R[m]);
PC+=2;
MACL,R0
MULS.W (Multiply as Signed Word): Arithmetic Instruction
Rm,Rn
Rm,Rn
Abstract
Signed operation,
Rn
; Before execution: R0 = H'FFFFFFFE, R1 = H'00005555
; After execution:
; Operation result
Rm
MACL
MACL = H'FFFF5556
Code
0010nnnnmmmm1111
Rev. 5.00 Jun 30, 2004 page 217 of 512
Section 6 Instruction Descriptions
Cycle
1 (to 3)
T
Bit SH-1
—
REJ09B0171-0500O
Instructions
Applicable
SH-2
SH-
DSP