HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 470

IC H8 MCU FLASH 256K 100TQFP

HD64F7047F50V

Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheets

Specifications of HD64F7047F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Section 7 Pipeline Operation
7. When an LDS (register) instruction is located immediately after a MAC.W instruction
Rev. 5.00 Jun 30, 2004 page 454 of 512
REJ09B0171-0500O
Other instruction
Other instruction
Other instruction
Other instruction
Other instruction
Other instruction
When the contents of a MAC register are loaded from a general-purpose register using an LDS
instruction, an MA stage for accessing the multiplier is added to the LDS instruction, as
described later. When the MA of the LDS instruction contends with the operating multiplier
(mm), the MA is extended until the mm ends (the M—A shown in the dotted line box in figure
7.41) to create a single slot. The MA of this LDS contends with IF. Figure 7.41 illustrates how
this occurs, assuming MA and IF contention.
Figure 7.41 LDS (Register) Instruction Immediately After a MAC.W Instruction
MAC.W
MAC.W
LDS
LDS
......
......
IF
if
ID
ID
IF
if
EX
EX
MA —
MA
ID
if
MA
ID
IF
MA
mm
EX
EX
ID
ID EX
IF
if
mm
mm
MA
M——A
ID
if
mm
EX
ID EX ....
EX MA
ID
IF
EX
ID
EX
....
: Slot
: Slot

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