HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 493
HD64F7047F50V
Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Specifications of HD64F7047F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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5. When an STS (register) instruction is located immediately after a MULS.W instruction
When the contents of a MAC register are stored in a general-purpose register using an STS
instruction, an MA stage for accessing the multiplier is added to the STS instruction, as
described later. When the MA of the STS instruction contends with the operating multiplier
(mm), the MA is extended until the mm ends (the M—A shown in the dotted line box in figure
7.68) to create a single slot. The MA of the STS contends with the IF. Figure 7.68 illustrates
how this occurs, assuming MA and IF contention.
Other instruction
Other instruction
Other instruction
Other instruction
Other instruction
Other instruction
Figure 7.68 STS (Register) Instruction Immediately After a MULS.W Instruction
MULS.W
MULS.W
STS
STS
......
......
IF
if
ID
ID
IF
if
EX
EX
ID EX
IF
ID
if
MA
MA
ID
—
—
if
mm
mm
M——A
EX
—
—
ID
IF
mm
mm
MA
EX
—
—
ID
if
WB
WB
EX
EX
ID EX
ID
IF
Rev. 5.00 Jun 30, 2004 page 477 of 512
MA
EX
ID
......
EX ......
Section 7 Pipeline Operation
REJ09B0171-0500O
: Slot
: Slot
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