HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 111

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Instruction codes, operation, and execution cycles are listed as shown in table 10.2 by
classification.
Classification Types
Branch
System
control
Total: 65
9
14
Operation
Code
BF
BT
BRA
BRAF
BSR
BSRF
JMP
JSR
RTS
CLRMAC
CLRT
LDC
LDRE
LDRS
LDS
NOP
RTE
SETRC
SETT
SLEEP
STC
STS
TRAPA
Function
Conditional branch (T
Conditional branch with delay
Conditional branch (T
Conditional branch with delay
Unconditional branch
Unconditional branch
Branch to subroutine procedure
Branch to subroutine procedure
Unconditional branch
Branch to subroutine procedure
Return from subroutine procedure
MAC register clear
T bit clear
Load to control register
Load to repeat end register
Load to repeat start register
Load to system register
No operation
Return from exception processing
Set number of repeats
T bit set
Shift into power-down state
Storing control register data
Storing system register data
Trap exception handling
0)
1)
Rev. 5.00 Jun 30, 2004 page 95 of 512
SH-1 SH-2
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Instructions
Applicable
Section 5 Instruction Set
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REJ09B0171-0500O
SH-
DSP
No. of
Instructions
11
71
182