HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 317

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.3.1
Description: Finds absolute values. When the Sx and Sy operands are positive, the contents of the
operands are stored to the Dz operand. If the value is negative, the amounts of the Sx and Sy
operand contents are subtracted from 0 and stored in the Dz operand.
The DC bit of the DSR register are updated according to the specifications of the CS bits. The N,
Z, V, and GT bits of the DSR register are updated.
Operation:
Format
PABS Sx,Dz If Sx 0,Sx Dz
PABS Sy,Dz If Sy 0,Sy Dz
/* Case1: PABS Sx,Dz */
/* Case2: PABS Sx,Dz */
{
unsigned char carry_bit, negative_bit, zero_bit, overflow_bit,
borrow_bit;
/* ALU Sources assignment */
DSP_ALU_SRC1 = 0
DSP_ALU_SRC1G = 0
if (Case1) {
PABS (Absolute): DSP Arithmetic Operation Instruction
switch (xx) {/* Sx Operand selection bit (xx) */
Abstract
If Sx<0,0–Sx Dz
If Sy<0,0–Sy Dz
case 0x0: DSP_ALU_SRC2
case 0x1: DSP_ALU_SRC2
if (DSP_ALU_SRC2_MSB) DSP_ALU_SRC2G = 0xff;
else
break;
if (DSP_ALU_SRC2_MSB) DSP_ALU_SRC2G = 0xff;
else
/* PABS Sx,Dz */
DSP_ALU_SRC2G = 0x0;
Code
111110**********
10001000xx00zzzz
111110**********
1010100000yyzzzz
DSP_ALU_SRC2G = 0x0;
= X0;
= X1;
Rev. 5.00 Jun 30, 2004 page 301 of 512
Cycle DC Bit
1
1
Section 6 Instruction Descriptions
Update
Update
SH-1 SH-2
—
—
REJ09B0171-0500O
Instructions
Applicable
—
—
SH-
DSP