HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 371

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.3.14
Description: Reverses the sign. Subtracts the Sx and Sy operands from 0 and stores the result in
the Dz operand. When conditions are specified for DCT and DCF, the instruction is executed
when those conditions are TRUE. When they are FALSE, the instruction is not executed.
When conditions are not specified, the DC bit of the DSR register is updated according to the
specifications for the CS bits. The N, Z, V, and GT bits of the DSR register are also updated. If
conditions are specified, the DC, N, Z, V, and GT bits are not updated even is the conditions were
true and the instruction was executed.
Format
PNEG Sx,Dz
PNEG Sy,Dz
DCT PNEG Sx,Dz
DCT PNEG Sy,Dz
DCF PNEG Sx,Dz
DCF PNEG Sy,Dz
[if cc] PNEG (Negate): DSP Arithmetic Operation Instruction
Abstract
0 – Sx Dz
0 – Sy Dz
if DC 1, 0 – Sx Dz
if 0, nop
if DC 1, 0 – Sy Dz
if 0, nop
if DC 0, 0 – Sx Dz
if 1, nop
if DC 0, 0 – Sy Dz
if 1, nop
111110**********
11001001xx00zzzz
111110**********
1110100100yyzzzz
111110**********
11001010xx00zzzz
111110**********
1110101000yyzzzz
111110**********
11001011xx00zzzz
111110**********
1110101100yyzzzz
Code
Rev. 5.00 Jun 30, 2004 page 355 of 512
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1
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1
Cycle
Section 6 Instruction Descriptions
DC Bit
Update
Update
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REJ09B0171-0500O
SH-1
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Instructions
Applicable
SH-2
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SH-
DSP