HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 5

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Introduction
The SH-1 and SH-2 incorporates a RISC (Reduced Instruction Set Computer) type CPU. A basic
instruction can be executed in one clock cycle, realizing high performance operation. A built-in
multiplier can execute multiplication and addition as quickly as DSP.
TM
The SH-DSP is a 32 bit microcontroller based on Renesas SuperH
RISC engine that realizes the
same signal processing capability as a general usage DSP (Digital Signal Processor). The SH-DSP
offers an improvement on the DSP functions of multiplication and multiply and accumulate in
SuperH microprocessors by using a DSP style data path function. It maintains upward
compatibility at the object code level with the SH-1 and SH-2 microprocessors and has the many
functions, low power usage, and low price of other SuperH microprocessors.
The SH-DSP achieves high performance in processing operations by using a RISC CPU core and
a DSP unit with DSP functions. This new type of single chip RISC-DSP simultaneously integrates
the peripheral functions needed to build systems into the SH-DSP and provides the lower-power
consumption vital to microprocessor applications.
This Software Manual describes in detail the basic architecture and instructions for the SH-1, SH2,
and SH-DSP and is intended as a reference on instruction operation and architecture. It also covers
the operation of pipelines, which are a feature of the SuperH microprocessor.
For software development environment system, contact your Renesas Technology Corp. sales
office.
TM
Note:
SuperH
is a trademark of Renesas Technology Corp.
Rev. 5.00 Jun 30, 2004 page iii of xiv
REJ09B0171-0500O