HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 277

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.1.68
Description: Reads byte data from the address specified by general register Rn, and sets the T bit
to 1 if the data is 0, or clears the T bit to 0 if the data is not 0. Then, data bit 7 is set to 1, and the
data is written to the address specified by Rn. During this operation, the bus is not released.
Operation:
Example:
Format
TAS.B @Rn
TAS(long n)
{
}
_LOOP TAS.B @R7
long temp;
temp=(long)Read_Byte(R[n]);
if (temp==0) T=1;
else T=0;
temp|=0x00000080;
Write_Byte(R[n],temp);
PC+=2;
TAS (Test and Set): Logic Operation Instruction
BF
Abstract
When (Rn) is 0, 1
MSB of (Rn)
/* TAS.B @Rn */
_LOOP
T, 1
; R7 = 1000
; Loops until data in address 1000 is 0
Code
0100nnnn00011011
/* Bus Lock enable */
/* Bus Lock disable */
Rev. 5.00 Jun 30, 2004 page 261 of 512
Cycle
4
Section 6 Instruction Descriptions
T Bit
Test
results
REJ09B0171-0500O
SH-1
Instructions
Applicable
SH-2
SH-
DSP