HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 304

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Instruction Descriptions
Instruction
PSUB
Sx,Sy,Dz
DCT PSUB
Sx,Sy,Dz
DCF PSUB
Sx,Sy,Dz
PSUB
Sx,Sy,Du
PMULS
Se,Sf,Dg
PSUBC
Sx,Sy,Dz
PXOR
Sx,Sy,Dz
DCT PXOR
Sx,Sy,Dz
DCF PXOR
Sx,Sy,Dz
Note:
DSP instructions are explained using the same form as for CPU instructions. However, in the
description of operation using C, usage of the following DSP resources is presupposed:
1. DSP Register Definitions
The DSP register names are defined based on the union named DSP_Register_Set noted below.
This union is composed of 11 longwords; each of these longwords corresponds to one of the 11
DSP registers (A0, A1, M0, M1, X0, X1, Y0, Y1, AG0, AG1, DSR).
Rev. 5.00 Jun 30, 2004 page 288 of 512
REJ09B0171-0500O
/* Definition of Union DSP_Register_Set */
union {
unsigned long int uli[11];
unsigned short int usi[22];
struct {
* Updated based on the PADD operation results
struct {
Operation
Sx–Sy Dz
If DC = 1, Sx – Sy Dz;
if 0, nop
If DC = 0, Sx – Sy Dz;
if 1, nop
Sx – Sy Du;
MSW of Se
Sx–Sy–DC Dz
Sx ^ Sy Dz, clear LSW of Dz
If DC = 1, Sx ^ Sy Dz,
clear LSW of Dz; if 0, nop
If DC = 0, Sx ^ Sy Dz,
clear LSW of Dz; if 1, nop
MSW of Sf Dg
Code
111110**********
10100001xxyyzzzz
111110**********
10100010xxyyzzzz
111110**********
10100011xxyyzzzz
111110**********
0110eeffxxyygguu
111110**********
10100000xxyyzzzz
111110**********
10100101xxyyzzzz
111110**********
10100110xxyyzzzz
111110**********
10100111xxyyzzzz
Cycles DC Bit SH-1 SH-2
1
1
1
1
1
1
1
1
Update —
—
—
Update —
Update —
Update —
—
—
—
—
—
—
Instructions
Applicable
—
—
—
—
—
—
—
—
SH-
DSP