HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 151

IC H8 MCU FLASH 256K 100TQFP

HD64F7047F50V

Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheets

Specifications of HD64F7047F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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6.1.5
Description: Logically ANDs the contents of general registers Rn and Rm, and stores the result in
Rn. The contents of general register R0 can be ANDed with zero-extended 8-bit immediate data.
8-bit memory data pointed to by GBR relative addressing can be ANDed with 8-bit immediate
data.
Note: After AND #imm, R0 is executed and the upper 24 bits of R0 are always cleared to 0.
Operation:
Format
AND
AND
AND.B #imm,
AND(long m,long n)
{
}
ANDI(long i) /* AND #imm,R0 */
{
}
ANDM(long i) /* AND.B #imm,@(R0,GBR) */
{
R[n]&=R[m]
PC+=2;
R[0]&=(0x000000FF & (long)i);
PC+=2;
long temp;
temp=(long)Read_Byte(GBR+R[0]);
temp&=(0x000000FF & (long)i);
Write_Byte(GBR+R[0],temp);
Rm,Rn
#imm,R0
@(R0,GBR)
AND (AND Logical): Logic Operation Instruction
Abstract
Rn & Rm
R0 & imm
(R0 + GBR) &
imm
(R0 + GBR)
/* AND Rm,Rn */
Rn
R0
Code
0010nnnnmmmm1001
11001001iiiiiiii
11001101iiiiiiii
Rev. 5.00 Jun 30, 2004 page 135 of 512
Cycle
1
1
3
Section 6 Instruction Descriptions
T Bit
REJ09B0171-0500O
SH-1
Instructions
Applicable
SH-2
SH-
DSP

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