HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 253

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.1.56
Description: Arithmetically shifts the contents of general register Rn to the right by one bit, and
stores the result in Rn. The bit that is shifted out of the operand is transferred to the T bit (figure
6.9).
Operation:
Example:
Format
SHAR Rn
SHAR(long n) /* SHAR Rn */
{
}
SHAR
long temp;
if ((R[n]&0x00000001)==0) T=0;
else T=1;
if ((R[n]&0x80000000)==0) temp=0;
else temp=1;
R[n]>>=1;
if (temp==1) R[n]|=0x80000000;
else R[n]&=0x7FFFFFFF;
PC+=2;
SHAR (Shift Arithmetic Right): Shift Instruction
R0
Abstract
MSB
; Before execution:
; After execution:
SHAR
Rn
T
Figure 6.9 Shift Arithmetic Right
MSB
Code
0100nnnn00100001 1
R0 = H'80000001, T = 0
R0 = H'C0000000, T = 1
Rev. 5.00 Jun 30, 2004 page 237 of 512
Cycle T Bit
Section 6 Instruction Descriptions
LSB
LSB
T
SH-1 SH-2
REJ09B0171-0500O
Instructions
Applicable
SH-
DSP