HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 432

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 7 Pipeline Operation
position when the bottom 2 bits of instruction address are 00 is A1 = 0 and A0 = 0) because the
MA of the instruction falls in the same slot as ifs that follow.
Relationship between Position of Instructions Located in On-Chip Memory and Contention
between IF and MA: When an instruction is located in on-chip memory, there are instruction
fetch stages (“if”, written in lower case) that do not generate bus cycles. When an if is in
contention with an MA, the slot will not split, as it does when an IF and an MA are in contention,
because ifs and MAs can be executed simultaneously. Such slots execute in the number of cycles
the MA requires for memory access.
When programming, avoid contention of MA and IF whenever possible and pair MAs with ifs to
increase the instruction execution speed.
Rev. 5.00 Jun 30, 2004 page 416 of 512
REJ09B0171-0500O
(On-chip memory
Instruc-
Instruc-
Instruc-
or on-chip cache)
Figure 7.8 Relationship Between the Location of Instructions in On-Chip Memory and
tion 1
tion 3
tion 5
32 bits
MA in slot A is in contention with an if, so no split occurs.
MA in slot B is in contention with an IF, so it splits.
Instruc-
Instruc-
Instruc-
tion 2
tion 4
tion 6
... Instruction 1
... Instruction 3
... Instruction 5
Instruction 2
Instruction 4
Instruction 6
Contention Between IF and MA
IF
ID
if
EX
ID
IF
IF
if
MA WB
EX
ID
A
if
: Splits
: Does not split
MA WB
—
—
B
EX
ID
IF
EX
ID
if
EX
ID
EX
: Slot