HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 310

IC H8 MCU FLASH 256K 100TQFP

HD64F7047F50V

Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheets

Specifications of HD64F7047F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Section 6 Instruction Descriptions
3. Multiplier Input/Output
The multiplier input/output is defined based on the union named DSP_MUL_Set noted below.
This union is composed of four longwords. One longword each is allocated for the two inputs, but
only the upper 16 bits of both of these (usi [0], usi [2]) are used. Two longwords including guard
bit usage (dst, dstg) correspond to the outputs.
The multiplier input/output names are defined as follows, using the union DSP_MUL_Set noted
above.
Rev. 5.00 Jun 30, 2004 page 294 of 512
REJ09B0171-0500O
#define MINUS_OP_G_OV ((~DSP_ALU_SRC1G_BIT7 && DSP_ALU_SRC2G_BIT7 &&
DSP_ALU_DSTG_BIT7) || (DSP_ALU_SRC1G_BIT7 && ~DSP_ALU_SRC2G_BIT7 &&
~DSP_ALU_DSTG_BIT7))
#define POS_NOT_OV ((DSP_ALU_DSTG_LSB8==0x00) &&
(DSP_ALU_DST_MSB==0x0))
#define NEG_NOT_OV ((DSP_ALU_DSTG_LSB8==0xff) &&
(DSP_ALU_DST_MSB==0x1))
/* Definition of Union DSP_MUL_Set */
union {
} DSP_MUL_Set;
/* Definition of multiplier input/output in DSP operation instructions
*/
#define DSP_M_SRC1
#define DSP_M_SRC2
unsigned long int
struct {
} aa;
unsigned short int usi[4];
struct {
} dst;
struct {
} dstg;
unsigned msb: 1;
unsigned: 31;
unsigned: 24;
unsigned lsb8: 8;
DSP_MUL_Set.aa.usi[0]
DSP_MUL_Set.aa.usi[2]
uli[4];

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