MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 85

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MPC8544COMEDEV

Manufacturer Part Number
MPC8544COMEDEV
Description
KIT DEV EXPRESS MPC8544COM
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheets

Specifications of MPC8544COMEDEV

Contents
Board
For Use With/related Products
MPC8544
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table
Number
18-90
18-91
18-92
18-93
18-94
18-95
18-96
18-97
18-98
18-99
18-100
18-101
18-102
18-103
18-104
18-105
18-106
18-107
18-108
18-109
18-110
18-111
18-112
18-113
18-114
18-115
18-116
18-117
18-118
18-119
18-120
18-121
18-122
18-123
19-1
19-2
19-3
19-4
19-5
Freescale Semiconductor
PCI Express Root Status Register Field Description .......................................................... 18-78
PCI Express Capability ID Register Field Description....................................................... 18-78
PCI Express MSI Message Control Register Field Description ......................................... 18-79
PCI Express MSI Message Address Register Field Description ........................................ 18-79
PCI Express MSI Message Upper Address Register Field Description ............................. 18-80
PCI Express MSI Message Data Register Field Description.............................................. 18-80
PCI Express Advanced Error Reporting Capability ID
PCI Express Uncorrectable Error Status Register Field Description.................................. 18-82
PCI Express Uncorrectable Error Mask Register Field Description................................... 18-83
PCI Express Uncorrectable Error Severity Register Field Description .............................. 18-84
PCI Express Correctable Error Status Register Field Description...................................... 18-85
PCI Express Correctable Error Mask Register Field Description....................................... 18-86
PCI Express Advanced Error Capabilities and Control
PCI Express Header Log Register Field Description.......................................................... 18-87
PCI Express Root Error Command Register Field Description.......................................... 18-88
PCI Express Root Error Command Register Field Description.......................................... 18-88
PCI Express Correctable Error Source ID Register Field Description ............................... 18-89
PCI Express Correctable Error Source ID Register Field Description ............................... 18-89
PEX_LTSSM_STAT Field Descriptions ............................................................................. 18-90
PEX_LTSSM_STAT Status Codes...................................................................................... 18-90
PEX_GCLK_RATIO Field Descriptions ............................................................................ 18-92
PEX_PM_TIMER Field Descriptions ................................................................................ 18-93
PEX_PME_TIMEOUT Field Descriptions ........................................................................ 18-93
PEX_SSVID_UPDATE Field Descriptions........................................................................ 18-94
PEX_CFG_READY Field Descriptions ............................................................................. 18-95
PEX_PME_TO_ACK_TOR Field Descriptions................................................................. 18-95
PEX_SS_INTR_MASK Field Descriptions ....................................................................... 18-96
PCI Express Transactions ................................................................................................... 18-98
Internal Platform (OCeaN) Message Data Format ........................................................... 18-103
PCI Express ATMU Outbound Messages ......................................................................... 18-103
PCI Express RC Inbound Message Handling ................................................................... 18-104
PCI Express EP Inbound Message Handling.................................................................... 18-105
Initial credit advertisement................................................................................................ 18-107
Power Management State Supported ................................................................................ 18-108
External Signal Summary ..................................................................................................... 19-2
Detailed Signal Descriptions................................................................................................. 19-2
Global Utilities Block Register Summary ............................................................................ 19-3
PORPLLSR Field Descriptions ............................................................................................ 19-5
PORBMSR Field Descriptions ............................................................................................. 19-6
Register Field Description.............................................................................................. 18-82
Register Field Description.............................................................................................. 18-86
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Tables
Title
Number
Page
lxxxv

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