MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 70

• Manufacturer Part Number: MPC8544COMEDEV
• Description: KIT DEV EXPRESS MPC8544COM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8544COMEDEV

• Contents: Board
• For Use With/related Products: MPC8544
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table
Number
7-19
7-20
7-21
7-22
7-23
7-24
7-25
7-26
7-27
7-28
7-29
7-30
8-1
8-2
8-3
8-4
8-5
8-6
8-7
8-8
8-9
8-10
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
9-9
9-10
9-11
9-12
9-13
9-14
9-15
9-16
9-17
9-18
9-19
lxx
L2ERRATTR Field Descriptions .......................................................................................... 7-23
L2ERRADDRH Field Description ....................................................................................... 7-24
L2ERRADDRL Field Description........................................................................................ 7-25
L2ERRCTL Field Descriptions ............................................................................................ 7-25
Fastest Read Timing—Hit in L2 ........................................................................................... 7-27
PLRU Bit Update Algorithm ................................................................................................ 7-32
PLRU-Based Victim Selection Mechanism .......................................................................... 7-33
L2 Cache States..................................................................................................................... 7-35
State Transitions Due to Core-Initiated Transactions ........................................................... 7-35
State Transitions Due to System-Initiated Transactions ....................................................... 7-38
L2 Cache ECC Syndrome Encoding..................................................................................... 7-39
L2 Cache ECC Syndrome Encoding (Check Bits) ............................................................... 7-40
ECM Memory Map ................................................................................................................. 8-3
EEBACR Field Descriptions .................................................................................................. 8-4
EEBPCR Field Descriptions ................................................................................................... 8-4
EIPBRR1 Field Descriptions .................................................................................................. 8-5
EIPBRR2 Field Descriptions .................................................................................................. 8-6
EEDR Field Descriptions........................................................................................................ 8-6
EEER Field Descriptions ........................................................................................................ 8-7
EEATR Field Descriptions...................................................................................................... 8-7
EELADR Field Descriptions .................................................................................................. 8-8
EEHADR Field Descriptions .................................................................................................. 8-9
DDR Memory Interface Signal Summary .............................................................................. 9-3
Memory Address Signal Mappings......................................................................................... 9-4
Memory Interface Signals—Detailed Signal Descriptions ..................................................... 9-5
Clock Signals—Detailed Signal Descriptions ........................................................................ 9-9
DDR Memory Controller Memory Map................................................................................. 9-9
CSn_BNDS Field Descriptions............................................................................................. 9-11
CSn_CONFIG Field Descriptions ........................................................................................ 9-12
TIMING_CFG_3 Field Descriptions .................................................................................... 9-14
TIMING_CFG_0 Field Descriptions .................................................................................... 9-14
TIMING_CFG_1 Field Descriptions .................................................................................... 9-16
TIMING_CFG_2 Field Descriptions .................................................................................... 9-19
DDR_SDRAM_CFG Field Descriptions.............................................................................. 9-21
DDR_SDRAM_CFG_2 Field Descriptions.......................................................................... 9-24
DDR_SDRAM_MODE Field Descriptions.......................................................................... 9-25
DDR_SDRAM_MODE_2 Field Descriptions...................................................................... 9-26
DDR_SDRAM_MD_CNTL Field Descriptions................................................................... 9-27
Settings of DDR_SDRAM_MD_CNTL Fields .................................................................... 9-28
DDR_SDRAM_INTERVAL Field Descriptions .................................................................. 9-29
DDR_DATA_INIT Field Descriptions ................................................................................. 9-29
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
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