MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 515

Manufacturer Part Number

MPC8544COMEDEV

KIT DEV EXPRESS MPC8544COM

Manufacturer

Freescale Semiconductor

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

This register, shown in

64. All data to be processed by the DEU must be a multiple of the DES algorithm block size of 64 bits; the

DEU does not automatically pad messages out to 64-bit blocks. If a data size that is not a multiple of 64

bits is written, a data size error will be generated. Only bits 58–63 are checked to determine if there is a

data size error. Since all upper bits are ignored, the entire message length (in bits) can be written to this

This register is cleared when the DEU is reset or re-initialized.

This register, shown in

self-clearing bits:

Freescale Semiconductor

Offset DEU 0x3_2010

Offset DEU 0x3_2018

describes DEU reset control register fields.

Reset interrupt. Writing this bit active high causes DEU interrupts signaling DONE and ERROR to be reset. It

further resets the state of the DEU interrupt status register.

0 Don’t reset

1 Reset interrupt logic

DEU Data Size Register (DEUDSR)

DEU Reset Control Register (DEURCR)

MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1

Table 12-17. DEU Reset Control Register Field Descriptions

12-15, stores the number of bits in the final message block, which must be

12-16, allows three levels reset of just DEU, as defined by the three

Figure 12-16. DEU Reset Control Register

Figure 12-15. DEU Data Size Register

Security Engine (SEC) 2.1

Access: Read/Write