MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 13

• Manufacturer Part Number: MPC8544COMEDEV
• Description: KIT DEV EXPRESS MPC8544COM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8544COMEDEV

• Contents: Board
• For Use With/related Products: MPC8544
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Paragraph
Number
8.1
8.1.1
8.1.2
8.2
8.2.1
8.2.1.1
8.2.1.2
8.2.1.3
8.2.1.4
8.2.1.5
8.2.1.6
8.2.1.7
8.2.1.8
8.2.1.9
8.3
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
8.4
9.1
9.2
9.2.1
9.3
9.3.1
9.3.2
9.3.2.1
9.3.2.2
9.3.2.3
9.4
Freescale Semiconductor
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Introduction...................................................................................................................... 8-1
Memory Map/Register Definition ................................................................................... 8-3
Functional Description..................................................................................................... 8-9
Initialization/Application Information ........................................................................... 8-10
Introduction...................................................................................................................... 9-1
Features ............................................................................................................................ 9-2
External Signal Descriptions ........................................................................................... 9-3
Memory Map/Register Definition ................................................................................... 9-9
Overview...................................................................................................................... 8-2
Features........................................................................................................................ 8-2
Register Descriptions................................................................................................... 8-3
I/O Arbiter.................................................................................................................... 8-9
CCB Arbiter................................................................................................................. 8-9
Transaction Queue ..................................................................................................... 8-10
Global Data Multiplexor............................................................................................ 8-10
CCB Interface ............................................................................................................ 8-10
Modes of Operation ..................................................................................................... 9-3
Signals Overview......................................................................................................... 9-3
Detailed Signal Descriptions ....................................................................................... 9-5
ECM CCB Address Configuration Register (EEBACR) ........................................ 8-3
ECM CCB Port Configuration Register (EEBPCR) ............................................... 8-4
ECM IP Block Revision Register 1 (EIPBRR1) ..................................................... 8-5
ECM IP Block Revision Register 2 (EIPBRR2) ..................................................... 8-5
ECM Error Detect Register (EEDR) ....................................................................... 8-6
ECM Error Enable Register (EEER) ....................................................................... 8-7
ECM Error Attributes Capture Register (EEATR) .................................................. 8-7
ECM Error Low Address Capture Register (EELADR) ......................................... 8-8
ECM Error High Address Capture Register (EEHADR) ........................................ 8-9
Memory Interface Signals........................................................................................ 9-5
Clock Interface Signals............................................................................................ 9-9
Debug Signals.......................................................................................................... 9-9
Memory, Security, and I/O Interfaces
e500 Coherency Module
DDR Memory Controller
Contents
Chapter 8
Chapter 9
Part III
Title
Number
Page
xiii