MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 749

• Manufacturer Part Number: MPC8544COMEDEV
• Description: KIT DEV EXPRESS MPC8544COM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8544COMEDEV

• Contents: Board
• For Use With/related Products: MPC8544
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
0x2_43C0–
0x2_4440–
0x2_4514–
0x2_43AC RBPTR5*—RxBD pointer for ring 5
0x2_43BC RBPTR7*—RxBD pointer for ring 7
0x2_43FC
0x2_440C RBASE1*—RxBD base address of ring 1
0x2_441C RBASE3*—RxBD base address of ring 3
0x2_442C RBASE5*—RxBD base address of ring 5
0x2_443C RBASE7*—RxBD base address of ring 7
0x2_44FC
0x2_450C HAFDUP—Half-duplex control
0x2_451C
0x2_43A8 Reserved
0x2_43B0 Reserved
0x2_43B4 RBPTR6*—RxBD pointer for ring 6
0x2_43B8 Reserved
0x2_4400 RBASEH—RxBD base address high bits
0x2_4404 RBASE0—RxBD base address of ring 0
0x2_4408 Reserved
0x2_4410 Reserved
0x2_4414 RBASE2*—RxBD base address of ring 2
0x2_4418 Reserved
0x2_4420 Reserved
0x2_4424 RBASE4*—RxBD base address of ring 4
0x2_4428 Reserved
0x2_4430 Reserved
0x2_4434 RBASE6*—RxBD base address of ring 6
0x2_4438 Reserved
0x2_4500 MACCFG1—MAC configuration register 1
0x2_4504 MACCFG2—MAC configuration register 2
0x2_4508 IPGIFG—Inter-packet/inter-frame gap register
0x2_4510 MAXFRM—Maximum frame length
0x2_4520 MIIMCFG—MII management configuration
eTSEC1
Offset
Reserved
Reserved
Reserved
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 15-4. Module Memory Map (continued)
Name
1
eTSEC MAC Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
—
—
—
—
—
—
—
—
Enhanced Three-Speed Ethernet Controllers
2
0x00A1_F037
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_7000
0x4060_5060
0x0000_0600
0x0000_0007
Reset
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