MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 80

• Manufacturer Part Number: MPC8544COMEDEV
• Description: KIT DEV EXPRESS MPC8544COM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8544COMEDEV

• Contents: Board
• For Use With/related Products: MPC8544
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table
Number
15-141
15-142
15-143
15-144
15-145
15-146
15-147
15-148
15-149
15-150
15-151
15-152
15-153
15-154
15-155
15-156
15-157
15-158
15-159
15-160
15-161
15-162
15-163
15-164
15-165
15-166
15-167
15-168
15-169
16-1
16-2
16-3
16-4
16-5
16-6
16-7
16-8
16-9
16-10
16-11
16-12
lxxx
8-Bit FIFO Interface Mode Signal Configurations ........................................................... 15-204
Special Filer Rules ............................................................................................................ 15-165
Receive Queue Filer Interrupt Events ............................................................................... 15-165
Filer Table Example—802.1p Priority Filing ................................................................... 15-166
Filer Table Example—IP Diff-Serv Code Points Filing ................................................... 15-167
Filer Table Example—TCP and UDP Port Filing............................................................. 15-167
Transmit Data Buffer Descriptor (TxBD) Field Descriptions .......................................... 15-175
Receive Buffer Descriptor Field Descriptions .................................................................. 15-178
MII Interface Mode Signal Configuration ........................................................................ 15-180
Shared MII Signals............................................................................................................ 15-181
MII Mode Register Initialization Steps............................................................................. 15-181
GMII Interface Mode Signal Configuration ..................................................................... 15-184
Shared GMII Signals......................................................................................................... 15-185
GMII Mode Register Initialization Steps.......................................................................... 15-185
TBI Interface Mode Signal Configuration ........................................................................ 15-188
Shared TBI Signals ........................................................................................................... 15-189
TBI Mode Register Initialization Steps............................................................................. 15-189
RGMII Interface Mode Signal Configuration................................................................... 15-192
Shared RGMII Signals ...................................................................................................... 15-193
RGMII Mode Register Initialization Steps ....................................................................... 15-193
RMII Interface Mode Signal Configuration...................................................................... 15-196
Shared RMII Signals ......................................................................................................... 15-197
RMII Mode Register Initialization Steps .......................................................................... 15-197
RTBI Interface Mode Signal Configuration...................................................................... 15-200
Shared RTBI Signals ......................................................................................................... 15-201
RTBI Mode Register Initialization Steps .......................................................................... 15-201
8-Bit FIFO Mode Register Initialization Steps ................................................................. 15-205
SGMII Interface Signal Configuration (4-Wire)............................................................... 15-206
SGMII Mode Register Initialization Steps........................................................................ 15-206
Relationship of Modes and Features ..................................................................................... 16-3
DMA Mode Bit Settings ....................................................................................................... 16-3
DMA Signals—Detailed Signal Descriptions....................................................................... 16-6
DMA Register Summary ...................................................................................................... 16-7
MRn Field Descriptions ...................................................................................................... 16-10
SRn Field Descriptions ....................................................................................................... 16-13
ECLNDARn Field Descriptions ......................................................................................... 16-15
CLNDARn Field Descriptions............................................................................................ 16-15
SATRn Field Descriptions .................................................................................................. 16-16
SARn Field Descriptions .................................................................................................... 16-17
DATRn Field Descriptions.................................................................................................. 16-18
DARn Field Descriptions.................................................................................................... 16-19
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
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Title
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