MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 435

• Manufacturer Part Number: MPC8544COMEDEV
• Description: KIT DEV EXPRESS MPC8544COM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8544COMEDEV

• Contents: Board
• For Use With/related Products: MPC8544
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 10-36
10.3.6.3
MSIIR provides a mechanism for setting an interrupt in the shared message signaled interrupt registers.
There are two fields. When MSIIR is written, MSIIR[SRS] selects the register in which an interrupt bit is
to be set; MSIIR[IBS] selects the shared interrupt field in the selected MSIR register to be set. This register
is primarily intended to support PCI Express MSIs. This register is write-only.
Table 10-37
Freescale Semiconductor
24–31
0–23
Offset 0x04_1740
Bits
Reset
8–31
Bits
0–2
3–7
Offset 0x4_1720
Reset
W
R
W
R
Name
S7–S0 Status n . Set when shared message signaled interrupt n is active
0
Name
SRS
IBS
0
—
SRS
—
describes the bits of the MSISR.
describes the bits of the MSIIRs.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
2
000 Shared message signaled interrupt register 0
001 Shared message signaled interrupt register 1
...
111 Shared message signaled interrupt register 7
00000
00001
...
11111
Reserved
Shared interrupt register select—Select the shared message signaled interrupt register
Interrupt bit select—Selects the bit to set in the MSIR
Shared Message Signaled Interrupt Index Register (MSIIR)
Reserved.
Figure 10-32. Shared Message Signaled Interrupt Status Register (MSISR)
Figure 10-33. Shared Message Signaled Interrupt Index Register (MSIIR)
3
Set field SH0 (bit 31)
Set filed SH1 (bit 30)
Set field SH31 (bit 0)
IBS
7
8
Table 10-36. MSISR Field Descriptions
Table 10-37. MSIIR Field Descriptions
—
All zeros
All zeros
Description
Description
—
23 24 25 26 27 28 29 30 31
Programmable Interrupt Controller
S7 S6 S5 S4 S3 S2 S1 S0
Access: Read Only
Access: Write only
10-37
31