MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 1194

• Manufacturer Part Number: MPC8544COMEDEV
• Description: KIT DEV EXPRESS MPC8544COM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8544COMEDEV

• Contents: Board
• For Use With/related Products: MPC8544
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Global Utilities
Table 19-56
19.5.1.2
CKSTP_IN is not described here because it is not considered a power management signal, although
asserting it does stop the core and a stopped core is technically in a low-power mode. CKSTP_IN is
described in
19.5.1.3
Many blocks in the MPC8544E can dynamically turn off clocks within the block when sections of the
block are idle. This feature is always enabled and occurs automatically.
19.5.1.4
As described in
shut down certain functional blocks within the MPC8544E when they are not needed in a particular
system. DEVDISR can be written by the e500 core or by an external master. Powering down a block in
this way turns off all clocks to that block.
DEVDISR was designed with the expectation that, once initialized by software, it would be modified only
by a hard system reset (HRESET). It is recommended that this register be written only during system
initialization. Blocks disabled by DEVDISR must not be re-enabled without a hard reset. (Setting
DEVDISR[TB] disables the core’s timer facilities, and setting DEVDISR[E500] places the core in the
core_stopped state in which it does not respond to interrupts.) The results of re-enabling previously
disabled blocks (by clearing the corresponding DEVDISR field) without a hard reset are boundedly
undefined.
19-28
Full On All units operating normally.
Sleep
Mode
Doze
Nap
lists basic characteristics of the low-power modes and the full on mode.
Section 19.3.2, “Detailed Signal Descriptions.”
Core stops dispatching new instructions (core is halted)
Core is stopped with clocks off except to time base
Should flush data cache before entering
Core is stopped with clocks off. Clocks powered down to all
blocks (including core time base) except to the interrupt
controller (PIC) unit
CKSTP_IN is Not Power Management
Dynamic Power Management
Shutting Down Unused Blocks
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Functional blocks disabled using DEVDISR cannot respond to
configuration accesses. Any access to configuration, control, and status
registers of a disabled block is a programming error.
Section 19.4.1.12, “Device Disable Register (DEVDISR),”
Table 19-30. MPC8544E Power Management Modes—Basic Description
Description
NOTE
Core Responds To
Snoop
Yes
Yes
No
No
Interrupts READY ASLEEP
DEVDISR provides a way to
Yes
Yes
Yes
Yes
Freescale Semiconductor
Asserted Negated
Negated Negated
Negated Negated
Negated Asserted
Signal States