MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 276

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MPC8544COMEDEV

Manufacturer Part Number
MPC8544COMEDEV
Description
KIT DEV EXPRESS MPC8544COM
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheets

Specifications of MPC8544COMEDEV

Contents
Board
For Use With/related Products
MPC8544
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
L2 Look-Aside Cache/SRAM
The mapping of address bits and SRAM mode to a way select is shown below in
reflected in L2CTL[L2SIZ].
7-6
(single 256-KB SRAM if L2SIZ=256 KB)
L2CTL Register
L2SRBAR Registers
Physical Address Bits
Entire Array is SRAM
Description
0
No SRAM
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
ADDR
Figure 7-4. Physical Address Usage for SRAM Accesses
Table 7-2. Way Selection for SRAM Accesses
18
ADDR
Bank select
Base Addr
21
20
20
L2SRAM
000
001
22
23
0
ADDR
Set index
(8 bits)
BAR 0 Hit
BAR hit compare
1
30
13
L2SRAM
Way Select
BAR 1 Hit
(3 bits)
Way
15
0
Addr[18–20]
31
Table
Byte select
(5 bits)
ADDR
000
001
010
011
100
101
110
111
Freescale Semiconductor
7-2. SRAM size is
35
31
Way Select
0
1
2
3
4
5
6
7

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