MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 6

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MPC8544COMEDEV

Manufacturer Part Number
MPC8544COMEDEV
Description
KIT DEV EXPRESS MPC8544COM
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheets

Specifications of MPC8544COMEDEV

Contents
Board
For Use With/related Products
MPC8544
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Paragraph
Number
1.4.4
1.4.5
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.3.1
2.2.3.2
2.2.3.3
2.2.3.4
2.2.3.5
2.2.3.6
2.2.3.7
2.2.3.8
2.2.3.9
2.2.4
2.2.5
2.2.5.1
2.2.5.2
2.2.5.3
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
3.1
3.2
3.3
vi
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Local Memory Map Overview and Example .................................................................. 2-1
Address Translation and Mapping ................................................................................... 2-3
Configuration, Control, and Status Register Map.......................................................... 2-10
Complete CCSR Map .................................................................................................... 2-14
Signals Overview ............................................................................................................. 3-1
Configuration Signals Sampled at Reset ....................................................................... 3-15
Output Signal States During Reset ................................................................................ 3-17
IP SAN Host Adapter ................................................................................................ 1-25
VoIP Aggregation Application................................................................................... 1-26
SRAM Windows.......................................................................................................... 2-4
Window into Configuration Space............................................................................... 2-4
Local Access Windows................................................................................................ 2-4
Outbound Address Translation and Mapping Windows.............................................. 2-9
Inbound Address Translation and Mapping Windows ................................................ 2-9
Accessing CCSR Memory from the Local Processor................................................ 2-10
Accessing CCSR Memory from External Masters .................................................... 2-11
Organization of CCSR Memory ................................................................................ 2-11
General Utilities Registers ......................................................................................... 2-12
Interrupt Controller and CCSR .................................................................................. 2-13
Device-Specific Utilities............................................................................................ 2-13
Local Access Register Memory Map ...................................................................... 2-5
Local Access IP Block Revision Register 1 (LAIPBRR1)...................................... 2-6
Local Access IP Block Revision Register 2 (LAIPBRR2)...................................... 2-6
Local Access Window n Base Address Registers (LAWBAR0–LAWBAR9)........ 2-7
Local Access Window n Attributes Registers (LAWAR0–LAWAR9) .................... 2-7
Precedence of Local Access Windows .................................................................... 2-8
Configuring Local Access Windows ....................................................................... 2-8
Distinguishing Local Access Windows from Other Mapping Functions ................ 2-9
Illegal Interaction Between Local Access Windows and DDR
PCI Inbound ATMU .............................................................................................. 2-10
PCI Express Inbound ATMU................................................................................. 2-10
Illegal Interaction Between Inbound ATMUs and Local Access Windows .......... 2-10
SDRAM Chip Selects.......................................................................................... 2-9
Signal Descriptions
Contents
Memory Map
Chapter 2
Chapter 3
Title
Freescale Semiconductor
Number
Page

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