MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 325

Manufacturer Part Number

MPC8544COMEDEV

KIT DEV EXPRESS MPC8544COM

Manufacturer

Freescale Semiconductor

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

DDR Memory Controller

The fully programmable DDR SDRAM controller supports most JEDEC standard x8, x16, or x32 DDR2

and DDR memories available. In addition, unbuffered and registered DIMMs are supported. However,

mixing different memory types or unbuffered and registered DIMMs in the same system is not supported.

Built-in error checking and correction (ECC) ensures very low bit-error rates for reliable high-frequency

operation. Dynamic power management and auto-precharge modes simplify memory system design. A

large set of special features, including ECC error injection, support rapid system debug.

Section 9.5, “Functional Description,”

Freescale Semiconductor

Introduction

is a high-level block diagram of the DDR memory controller with its associated interfaces.

MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1

In this chapter, the word ‘bank’ refers to a physical bank specified by a chip

select; ‘logical bank’ refers to one of the four or eight sub-banks in each

SDRAM chip. A sub-bank is specified by the 2 or 3 bits on the bank address

(MBA) pins during a memory access.

contains detailed figures of the controller.