MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 1108

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MPC8544COMEDEV

Manufacturer Part Number
MPC8544COMEDEV
Description
KIT DEV EXPRESS MPC8544COM
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheets

Specifications of MPC8544COMEDEV

Contents
Board
For Use With/related Products
MPC8544
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PCI Express Interface Controller
18.3.8.2.4
The capabilities pointer identifies additional functionality supported by the device.
18.3.8.2.5
The interrupt line register is used by device drivers and OS software to communicate interrupt line routing
information. Values in this register are programmed by system software and are system specific.
18-54
Offset 0x34
Reset
Offset 0x3C (EP-mode only)
Reset
W
W
R
R
Bits
7–0
0
7
7
Capabilities Pointer
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Capabilities Pointer Register—0x34
PCI Express Interrupt Line Register (EP-Mode Only)—0x3C
Name
Table 18-51. PCI Express Interrupt Line Register Field Description
Bits
7–0 Interrupt Line Used to communicate interrupt line routing information.
1
Table 18-50. Capabilities Pointer Register Field Description
Figure 18-54. PCI Express Interrupt Line Register
Name
Figure 18-53. Capabilities Pointer Register
The capabilities pointer provides the offset (0x44) for additional PCI-compatible
registers above the common 64-byte header. Refer to
Compatible Device-Specific Configuration
0
Capabilities Pointer
0
Interrupt Line
All zeros
Description
0
Description
Space,” for more information.
1
Section 18.3.9, “PCI
Freescale Semiconductor
0
Access: Read/Write
Access: Read-only
0
0
0

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