HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 515

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bit
3
2
1
0
Legend:
X: Don’t care
19.1.2
Bit
7 to
4
3, 2
1
0
Bit Name
STCS
SCK2
SCK1
SCK0
Bit Name
—
—
STC1
STC0
Low-Power Control Register (LPWRCR)
Initial Value
0
0
0
0
Initial Value
All 0
All 0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
—
R/W
R/W
R/W
Description
Frequency Multiplication Factor Switching Mode
Select
Selects the operation when the PLL circuit frequency
multiplication factor is changed.
0: Specified multiplication factor is valid after
1: Specified multiplication factor is valid immediately
System Clock Select 0 to 2
These bits select the bus master clock.
000: High-speed mode
001: Medium-speed clock is φ/2
010: Medium-speed clock is φ/4
011: Medium-speed clock is φ/8
100: Medium-speed clock is φ/16
101: Medium-speed clock is φ/32
11X: Setting prohibited
Description
Reserved
Only 0 should be written to these bits.
These bits can be read and write, but should not be
set to 1.
Frequency Multiplication Factor
The STC bits specify the frequency multiplication
factor of the PLL circuit.
00: ×1
01: ×2
10: ×4
11: Setting prohibited
transition to software standby mode
after STC1 bit and STC0 bit are rewritten
Rev. 7.00 Sep. 11, 2009 Page 479 of 566
Section 19 Clock Pulse Generator
REJ09B0211-0700